Instead of a command and event mechanism that relies on processors being
active (UMAC/LMAC) add a new command that reads from the RPU memory
directly for all stats, useful in debugging when processors are
crashed/non-functional.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Implement support for scatter-gather DMA transfers in the siwx917 driver.
This enhancement allows the driver to handle multiple non-contiguous memory
buffers in a single DMA transaction
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
Updated the driver to ensure that each DMA channel can properly
assign and handle individual callbacks.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
This new API allows the assignment of desired DMA channels for
peripheral transfers, enhancing flexibility and control over DMA
operations.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
Refactored the driver code to ensure compatibility with the
dma_context API, improving maintainability and consistency
with other DMA drivers in the Zephyr project.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
1. Corrected the burst length processing to be handled in bytes
for the siwx917 DMA drivers.
2. Removed overlay and configuration files associated with the
chan_blen_transfer test application. The chan_blen_transfer
test application attempted to use 8 and 16 byte bursts, which
are not supported by the siwx91x UDMA.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
Looping while waiting for auto-negotiation to complete can block the
system workqueue for several seconds.
Signed-off-by: Kevin ORourke <kevin.orourke@ferroamp.se>
Implement `irq_is_pending` in terms of the `irq_rx_ready` and
`irq_tx_ready` function calls.
Using `intstatus` directly results in an implementation that does not
conform to the interrupt driven UART API. Since `intstatus` bits are
only only set when a buffer transitions from full to empty, any calls to
`irq_is_pending` before any bytes have been sent will return 0. This is
problematic since the documented implementation for the API IRQ handler
is:
```
while (uart_irq_update(dev) && uart_irq_is_pending(dev)) {
if (uart_irq_rx_ready(dev)) {
...
}
if (uart_irq_tx_ready(dev)) {
uart_fifo_fill(dev, ...);
}
}
```
If `uart_irq_is_pending` does not return 1 until the first byte is sent,
we never end up pushing data to be transmitted into the `uart_fifo_full`
function.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add defines to avoid magic values in the dtsi.
Replace usb_dc_stm32_get_maximum_speed() with device tree property.
- Use DT_INST_STRING_UPPER_TOKEN(0, maximum_speed) to set the USB speed.
- Remove PCD_SPEED_FULL initialization.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Add defines to avoid magic values in the dtsi.
Replace usb_dc_stm32_get_maximum_speed() with device tree property.
- Use DT_INST_STRING_UPPER_TOKEN(0, maximum_speed) to set the USB speed.
- Remove PCD_SPEED_FULL initialization.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
#84065 replaced diagnostic pragmas with TOOLCHAIN_* macros, but we don't
need to use that here since __used is a cleaner way to indicate that the
function is used and will also prevent it from being optimized away at
link time if LTO is enabled.
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Add the ability to set the MAC address from the command line when
running a native sim build.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@basalte.be>
refactoring enable function into enable and disable increasing readability
and increasing coherence with other stepper apis in terms of
nomenclature
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
This commit adds ambiq iom binding file to consolidate
spi and i2c that share the same IO Master module on
Apollo MCUs
Signed-off-by: Hao Luo <hluo@ambiq.com>
Drivers update to use shared interrupt allocator for Xtensa
and RISCV devices.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update interrupt allocator to use the same driver for both
Xtensa and RISCV devices.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Only STM32F1X and STM32F2X are using the hal api v1,
both of these soc don't support ptp, so ptp support
for hal api v1 can be dropped.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
IS25LPXXXD uses the same jedec-id as IS25LPXXX, but the latter has
an extended read register, similar to IS25WPXXX. This change will
attempt to read the extended read register to determine what the
appropriate initialization value for read register should be.
Signed-off-by: John Barbero Unenge <git@lsrkttn.com>
This change is assumed to fix the random corruption of 4ch
capture for PDM1 channels 3-4 in PTL platform. There are no
solid facts behind this change but assumption that PDMx
controllers are not in sync if the start sequence for PDM1
is further away from PDM0. The PDM0 internal state may be
different from PDM1
The single for loop to handle the CIC and FIR start sequence
is split into two for loops to handle same registers update
tasks symmetrically for all stereo PDM controllers. E.g. two
PDMs for four microphones.
First loop programs the CIC_CONTROL and MIC_CONTROL registers
of the PDMx controllers. These features belong to the CIC block
in DMIC IP. Second loop programs the FIR_CONTROL registers of
the PDMx controllers.
In a stress test of 100 times repeated commands:
arecord -Dhw:0,6 -fS32_LE -r48000 -c4 -d 10 dmic_test_1.wav; \
sleep 0.5; \
arecord -Dhw:0,6 -fS32_LE -r48000 -c4 -d 10 dmic_test_2.wav; \
sleep 1
The corruption occurrence with xt-clang build was e.g. 87/200
fails in one of wav files giving 43.5% occurrence. The test was
done with Zephyr commit fe29c40a93
("llext: add inspection API test suite").
In a gcc build the occurrence of corruption is lower, around 6%
but it is seen that the channels 3-4 pdm1 are swapping randomly.
With this fix the corruption occurred zero times in xt-clang
and gcc builds with same 100 repeats.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Make use of pm_device_driver_init to perform driver initialization.
Implement PM suspend and resume, which performs the following actions:
* Enables/disables the USART
* Gates the USART clock
* Configures USART pins
Also take PM locks to prevent deep sleep during TX and RX operations.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Replace prefix from "uart_silabs_eusart" to "eusart" in order to
simplify the code, and make it more readable.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Allow STM32 I2C driver v2 to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.
By the way, remove a #ifdef directive on header files inclusion
that adds noise in the header file inclusion section without any
benefit.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Allow STM32 ADC driver to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.
By the way, remove some #ifdef directive on header files inclusion
that add noise in the header file inclusion section without any
benefit. Also remove inclusion of zephyr/arch/cache.h that is not
needed at all.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Allow STM32 SPI driver to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.
By the way, remove some #ifdef directive on header files inclusion
that add noise in the header file inclusion section without any
benefit.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Allow STM32 UART driver to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.
By the way, remove some #ifdef directive on header files inclusion
that add noise in the header file inclusion section without any
benefit.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Initial DAC driver for TI DAC161S997. This is a 1 channel 16 bit
DAC designed for 4-20 mA loops.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
unfortunatly HAL_ETH_SetMDIOClockRange() isn't available
in the V1 API, so I had to copy the parts from the hal.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
rewirte code and remove code that use internal phy functions.
A few Kconfig options got removed, that are now set by the
phy via the DT.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The api takes care, if the mdio bus_enable and bus_disable
are not needed, so there is no need to have tis in the driver.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Introduce a generic reset MMIO driver to be used for devices with a
single memory mapped reset bit required to take them out of reset.
Signed-off-by: Mohith Potluri <saimohith@google.com>
