Before communicating with the device, the driver needs to wait 300ms. This
moves all communication with the device from init to configure, such
that this delay can be avoided on startup by using zephyr,lazy-load.
Signed-off-by: Tobias Pisani <mail@topisani.dev>
Cast variable to uint64_t to ensure the multiplication is
performed using 64-bit arithmetic. Resolves static code
analysis warning from Coverity.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Add OS timer implementation making use of the Sleeptimer HAL.
Sleeptimer integrates tightly with the Silabs Power Manager HAL,
and must be used as the OS timer to achieve optimal power consumption
when using the radio.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
The defines should explicitly be passed to nordic HAL as they dont' use
the CONFIG_ prefix.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Removes support for B0 revision silicon. The B0 revision is no longer
recommended for use in host-controlled applications and there are no
users of this driver implementing B0 silicon in their final design.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Adds support for the control port write-lock feature introduced in
revision B1. The write-lock feature minimizes the risk of spurious
I2C writes flipping sensitive bits during device operation by blocking
writes to some or all of the register map.
If desired, the write-lock must be set in hardware by biasing PGPIO2
appropriately and setting the cirrus,hw-i2c-lock flag in the devicetree
entry.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Adds support for revision B1 silicon when checking CHIP_REV. This
silicon revision introduces the hardware I2C lock.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Moves the CHIP_REV log message after the CHIP_REV switch case. Printing
the log message after allows for the print to be reused for multiple
CHIP_REV cases.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Use FIELD_GET macro to grab CHIP_REV bitfield. This change improves
the readability of the source code and does not change functionality.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
In case of multiple OSes running on different CPU Cores which share the
same GIC controller, need to avoid the distributor re-configured to avoid
crash the OS has already been started.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add a pinctrl driver for Microchip MEC5 HAL based chips.
The driver removes the YAML enum "no change" property
value from the driver strength and slew rate properties.
Update the shared header file in mec soc common folder to
use a different Z_PINCTRL_STATE_PINCFG_INIT for MEC5.
Modifications to legacy MEC172x XEC PINCTRL will be in
a future PR.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
As per dma_stop() documentation, the implementation has to not just stop
the transfer, but also to disable the channel. Before this commit, only
the transfer has been stopped.
Same goes for dma_start(). This also allows the enabling of a channel to
be removed from dma_si32_config().
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Remove Kconfig dependency on SOC_FAMILY_KINETIS as the temperature
sensor is available also on MCX family.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Add CONFIG_NXP_WIFI_BUILD_ONLY_MODE, which allows the NXP WiFi driver to
be built without a binary blob. The built application will not be
functional, but this enables continuous integration to run upstream.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
set_btwt API implementation is not complete. Remove the structure
definition and implementation from the NXP WiFi driver to fix a build
error.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
ap_bandwidth API implementation is not complete. Remove the structure
definition and implementation from the NXP WiFi driver to fix a build
error.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
There's no need to add conditions to CONFIG_PWM_NRF_SW, because it is
already conditioned to DT status. Right now, if any system uses both
normal PWM and "SW PWM", it needs to manually enable the driver
Kconfig.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The driver now does not wait for the completion of a measurement
in the submit function.
Instead it schedule the fetch and the completion of the
submission queue entry as delayed work to the system work queue.
Signed-off-by: Florian Weber <Florian.Weber@live.de>
regulator_npm1300_init() generated uninitialized variable warning.
Fix this by being consistent in the error checking in underlying function.
Signed-off-by: Audun Korneliussen <audun.korneliussen@nordicsemi.no>
Andes MBOX PLIC-SW use the same hardware as intc_plic driver. Reworked
mbox_andes_plic_sw implementation to leverage the intc_plic driver.
Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
The ILPS22QS is an ultra-compact piezoresistive absolute pressure sensor
which functions as a digital output barometer, supporting dual full-scale
up to user- selectable 4060 hPa. The device delivers ultra-low pressure
noise with very low power consumption and operates over an extended
temperature range from -40 °C to +105 °C.
(https://www.st.com/en/mems-and-sensors/ilps22qs.html)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add a generic lps2xdf_config_int() API to configure device interrupt
mode, and implement the specific routines for lps22df and lps28dfw.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Move api_lps2xdf_handle_interrupt() API inside the CONFIG_LPS2XDF_TRIGGER
ifdef, because it should be defined only in that case.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
DWC2 peripherals can have TxFIFO sizes configured to any value between
16 and 32768. The value configured during synthesis is the maximum value
the software can program. Designs that give full flexibility configure
the TxFIFO sizes to value equal to total SPRAM size.
Currently DWC2 driver does not have prior knowledge about the endpoints
used within available configurations and has to come up with TxFIFO0
value up front. The original approach was to use MAX(16, max allowed).
locations. Because DWC2 peripheral cannot have TxFIFO0 with size lower
than 16 locations, always the max allowed was used. This logic prevented
any IN endpoint other than EP0 on designs that have TxFIFO0 size set to
total SPRAM size.
Change the logic to MIN(2 * 16, max allowed) to have sufficient memory
available on flexible designs and allow simultaneous operation if
possible (i.e. when maximum TxFIFO0 size is at least 32).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
DWC2 otg OUT transfers are being used for SETUP DATA0, OUT Data Stage
packets and OUT Status Stage ZLP. On High-Speed it is possible for IN
Data Stage, OUT Status Stage ZLP and subsequent SETUP DATA0 to happen
in very quick succession, making all the three events appear at the same
time to the handler thread.
The handler thread is picking up next endpoint to handle based on the
least significant bit set. When OUT endpoints were on bits 0-15 and IN
endpoints were on bits 16-31, the least significant bit policy favored
OUT endpoints over IN endpoints. This caused problems in Completer mode
(but suprisingly not in Buffer DMA mode) that lead to incorrect control
transfer handling.
The choice between least significant bit first or most significant bit
first is arbitrary. Switching from least to most significant bit first
would have resolved the issue. It would also favor higher numbered
endpoints over lower numbered endpoints.
Swap the order of endpoints in bitmaps to have IN on bits 0-15 and OUT
on bits 16-31 to keep handling lower numbered endpoints first and
resolve the control transfer handling in Completer mode.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rename the Silabs HCI driver to hci_silabs_efr32.c to better indicate what
hardware it supports. Also rename the associated devicetree binding and
Kconfig options to be consistent with the new driver name.
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
The default configuration for PINCTRL should not be set with
the other default configurations in .defconfig, instead select
a default value as part of defining the UART driver.
Signed-off-by: Andrew Davis <afd@ti.com>
DT_INST* should be used in MSPI_CONFIG or device tree value capture
will fail sliently and fall back to defaults.
Signed-off-by: Swift Tian <swift.tian@ambiq.com>
This commit does the following:
1. tests set_callback and user_data
2. fixes the api as well as the drivers by passing user_data
back to the set callback
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
IS25LP flash chips have a similar P[6:3] register to the IS25WP series,
and need the same workaround.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Some NXP boards program the read parameters bits (P[6:3]) within the
IS25WP flash device during init, which will result in JESD216 probe
commands failing (as the number of dummy cycles will be incorrect). Add
handling to force these volatile bits to their default value to the
flexspi flash driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Quad enable method 5 reads status register 2 (one byte), but then writes
to 2 bytes to the status registers, so we need to shift the output
buffer in order to manage this correctly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Writing the quad enable bit on flash chips typically requires a write
enable instruction be issued before writing the non-volatile status
register, and the flash may remain busy briefly after programming this
bit. Add code to send the WREN instruction, and to wait for the flash to
finish programming after writing the status register.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move the LUT used for probing to be stored in .data, instead of on the
stack. This reduces stack usage during probe by 192 bytes, which avoids
stack overflows that were occurring on some platforms.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Even in cases where the alt-addr is set, we can still use the INT pin
during probe. Some boards require this, as if a reset GPIO is not
defined the INT pin may still need to be toggled in order to initialize
the GT911 IC correctly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
- Following similar approach followed on spi_mcux_lpspi driver.
- Enabling DMA by default when SPI RTIO is selected to favor
non-blocking transfers.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Updated ADXL372 driver with RTIO stream functionality.
RTIO stream is using both FIFO threshold and FIFO full triggers.
Together with RTIO stream, RTIO async read is also implemented.
Signed-off-by: Vladislav Pejic <vladislav.pejic@orioninc.com>
