This commit adds support for SLP_LAN and SLP_WLAN virtual wire signals
to notify the system.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit adds new device tree properties and Kconfig options to
distinguish the support in different chip.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Refactor the driver of FT8xx coprocessor by moving code common to
coprocessor commands to common functions.
Signed-off-by: Hubert Miś <hubert.mis@gmail.com>
Allows CONTAINER_OF inside trigger handler to be used to obtain a valid
ptr to the composite struct consisting of a struct sensor_trigger trig.
Fixeszephyrproject-rtos/zephyr#97124
Signed-off-by: Christoph Jans <jans.christoph@gmail.com>
To reduce the number of Kconfig files and improve maintainability,
we are merging the three different Kconfig files from Silabs for ADC.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
This commit introduces DMA support for the Silabs IADC driver.
A new Kconfig option is added to enable DMA support, ensuring
compatibility with the existing ADC configuration.
DMA can be used for synch/asynch operation.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
video_shell_get_ctrl_by_name() normalized the search string (`name`)
instead of the control's actual name (`cq->name`). This made the
comparison always succeed on the first control, causing incorrect
lookups at runtime.
Update the code to normalize `cq->name` before comparison so that
each control name is correctly checked against the search string.
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
This makes userchan transport behavior similar to other HCI
transports (eg IPC). Improved logging gives clear overview
of what RX events are discarded helping for configuration
tuning.
Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
Add missing SoC header include required by memory region assertion
to adc_nrfx_saadc and i2s_nrf_tdm shims.
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
Introduce Bouffalo Lab L1C cache management functions
This allows invalidating instructions and data on
BL60x and BL70x
Signed-off-by: Camille BAUD <mail@massdriver.space>
To avoid issues with multiple calls to fetch the USN returning garbage
data, memoize the returned USN value and re-use it on subsequent calls.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
STM32L5xx series shares several DMA configurations with
the other platforms. These changes aim to enable platform
specific DMA configuration and align them to other platforms.
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Add Clock Control driver support for Renesas RZ/A3UL, V2L
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Fix SDMMC initialization by starting with 1-bit bus mode and
properly configuring wide bus operation after HAL
initialization.
The SDMMC protocol requires initialization to start in
1-bit mode before switching to wider bus widths.
Previously, the driver attempted to initialize directly
with the target bus width, which could cause later read/write
failures.
Changes:
- Initialize with SDMMC_BUS_WIDE_1B instead of target bus width
- Add HAL_SD_ConfigWideBusOperation() call if needed after
successful init
- Add error logging for wide bus configuration failures
Fixes potential SDMMC read/write failures issues on STM32 platforms.
Signed-off-by: Shan Pen <bricle031@gmail.com>
Add support for the UltraChip UC8151D e-paper display (EPD) controller.
The UC8151D is part of the UC81xx family of display controllers commonly
used in e-ink displays.
This implementation extends the existing UC81xx driver infrastructure by
adding device tree bindings, Kconfig options, and the necessary driver
code to support the UC8151D variant.
Signed-off-by: Marc Espuña <mespuna@cactusiot.com>
The millionths value is calculated incorrectly.
The sensor has a precision of 0.5 which is 500000 millionths, but
there is an extra zero in the code. This fix removes the extra zero.
Signed-off-by: Sašo Domadenik <saso.doma@gmail.com>
Handle the case where there are multiple different kinds of UART on one
platform, the other UART driver select SERIAL_SUPPORT_ASYNC but LPUART
did not, causing build error in LPUART driver. Shield LPUART driver from
this case by introducing driver config to indicate that in fact LPUART
is the one enabling ASYNC.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Declare variable at the beginning of the function since having it
declared in the default case makes clang unhappy (can't declare a
variable after a label).
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Fixed a wrong function declare of 'nds_l2_cache_init'.
Replace `SOC_FAMILY_ANDES_V5` with `DT_HAS_ANDESTECH_ANDESCORE_V5_ENABLED`
condition to enable it to be used by compatible MCUs
Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
The DDR LUT entry for ERASE_CHIP was configured with an incorrect
kFLEXSPI_Command, resulting in the erase operation not being executed.
Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
The maximum speed should be configured individually for each board
since it depends on the layout and the controller's flexspi capabilities.
Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
In the DDR LUT, the dummy cycles were not defined for READ_STATUS_REG
and had a wrong value for READ.
The default amount of dummy cycles on this chip are 20 (0x14).
This means the LUT should contain the value of 0x28 (0x14*2) for DDR
at these entries.
Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
The TXFNF needs to be disabled for additional I3C targets
during the DAA process. Otherwise the TX interrupt might be triggered
before receiving full PID for target.
Signed-off-by: Adam BERLINGER <adam.berlinger@st.com>
Make sure the nordic_vpr_launcher gets started after the coresight
driver if that is present.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Added driver and bindings for the coresight nrf submodule.
add integrated it for the nrf54h20.
The coresight subsystem is a combination of ARM Coresight peripherals
that get configured together to achieve a simplified configuration based
on a desired operating mode.
This also replaces the previous handling in the nrf54h20 soc.c which was
powering the subsystem up but not configuring it.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Pinctrl needs to set the needed drive and direction of the pins. Also
this later allows automatically setting the clock bit for the traceclk
pin.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Moved the nrf_etr driver from the drive/misc folder into the recently
established driver/debug folder where it is a better fit. Moved the
associated files such as bindings and headers accordingly as well.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
The general ADC documentation states, that it is possible to use the
adc_read_async function with third parameter (k_poll_signal *async) set to
NULL, in which case the callback is called when all channels have been
converted. This change fixes this issue as it now also checks if a callback
has been set.
Signed-off-by: Torbjørn Biering Tvermosegaard <tbt@foss.dk>
For a i3c pure bus, the bus free timing shall be set to tcas
which is 38.4ns according to table 49 of the MIPI I3C v1.2
specification.
For a i3c mixed bus, the bus free timing shall be set to the scl
low time. Based on the i2cs' lvrs, it can determine if any devices
only support fast mode and won't do fast mode plus to determine
which tLOW setting it should use for bus free.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The function asserted `!sz && !ctrls`, which is the inverse of the
intended precondition. This caused assertion failures on valid inputs.
Update the check to `sz && ctrls` so it fails only when size is zero
or the control pointer is NULL.
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Add support in the OV5640 driver to configure the bus-width and
data-shift properties from devicetree when operating in DVP
(parallel) mode.
This allows the number of parallel data lines and the bit shift
to be set directly via DTS, ensuring correct configuration across
different hardware designs.
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Replace the custom I2C read/write functions in the OV5640 driver
with the common Video CCI API helpers.
- Introduce OV5640_REG8/REG16 macros for register addressing
- Convert struct ov5640_reg to struct video_reg16
- Replace ov5640_{read,write,modify}_reg() with CCI API helpers
- Replace ov5640_write_multi_regs() with video_write_cci_multiregs16()
This aligns the OV5640 driver with other video sensor drivers
that already rely on the CCI helpers.
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Enable support for latest GINF method which requires 3 paramters
for each GPIO group and enables gpio support for intel_ptl_h
platform.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Add Clock Control driver support for Renesas RZ/N2L, T2M
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Implementation based on STM32G4 series.
This is a preparation to enable reading and writing the RDP bits.
Signed-off-by: Martin Jäger <martin@libre.solar>
