Commit graph

23353 commits

Author SHA1 Message Date
Valerio Setti
dbda4642cd drivers: crypto: deprecated TinyCrypt shim driver
As part of the deprecation process of TinyCrypt started in #79566,
this commit set the TinyCrypt based crypto shim driver as
deprecated.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2024-11-05 13:44:20 -06:00
Daniel DeGrasse
cfb7322107 drivers: flash: flash_mcux_flexspi: add support for W25Q512NW-IQ/IN
Add support for the W25Q512NW-IQ/IN with the FLEXSPI, using a custom
LUT table.

Fixes #80592

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-11-05 10:55:13 -06:00
Duy Nguyen
0a68d492e2 dts: renesas: Separate pll p q r into child node
The new update of clock device tree make the pll p q r clock
source cannot be choose by other node
This fix add 1 new dts binding for pll out p q r out line

Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
2024-11-05 10:54:28 -06:00
Kevin ORourke
4690689a36 drivers: ethernet: eth_stm32_hal: fix bus error after disconnect
In some circumstances the struct eth_stm32_tx_context object that was
allocated on eth_tx's stack is still referenced after the function exits.
This usually happens when the network is disconnected, depending on the
PHY hardware.

When the network is reconnected there will eventually be a call to
HAL_ETH_ReleaseTxPacket, which calls HAL_ETH_TxFreeCallback with the
(now invalid) pointer to the tx context. When HAL_ETH_TxFreeCallback
tries to dereference that pointer we get a bus error.

Fix this by allocating struct eth_stm32_tx_context objects from a
static array, similarly to how the buffers are allocated. This ensures
that they remain valid until the HAL is finished with them.

Fixes: #79037

Signed-off-by: Kevin ORourke <kevin.orourke@ferroamp.se>
2024-11-05 10:54:16 -06:00
Chaitanya Tata
580707ed4d drivers: nrfwifi: Fixes from doc review
Help text fixes from doc-team.

Signed-off-by: Richa Pandey <richa.pandey@nordicsemi.no>
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-11-05 10:53:24 -06:00
Johann Fischer
973f914b90 drivers: udc_nrf: fix enqueue of control IN transfer with length 0
If the direction of the last setup packet is not to the device but to
the host, then the transfer is not a status stage and should be queued.
This is not checked and prevents a zero length control IN transfer to
the host, e.g. used by the DFU class to indicate the end of the upload
process.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2024-11-05 10:53:11 -06:00
Johann Fischer
0c299e66a4 drivers: udc_kinetis: reset control endpoint busy flags
Reset control endpoint busy flags if configured and enabled, otherwise
it could mark the wrong buffer as busy after endpoint disable/enable.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2024-11-05 10:53:11 -06:00
Gerson Fernando Budke
0cc8f93e8a soc: atmel: Drop PINCTRL from Kconfig.defconfig
This Kconfig has wrongly been added to defconfig files. It is not the
right place for it. It has never been the right place for it. Drivers
that need it should select the symbol in their Kconfig entries. Drop
PINCTL from Kconfig.defconfig and add proper select at Kconfig.sam*.

Fixes #78619

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-11-04 13:43:26 -06:00
Henrik Brix Andersen
0bb5270f7b drivers: can: sam: fix sys_write32() arguments order
Fix the order of the arguments to sys_write32().

Fixes: #80750

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2024-11-04 13:43:03 -06:00
Francois Ramu
a925d60cbd drivers: flash: stm32h7 flash driver reformat code
Apply clang-format to re-format the flash_stm32h7.c driver

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-11-04 13:41:46 -06:00
Francois Ramu
331423d8e3 drivers: flash: stm32H7 flash driver enable clock when defined
Not all the stm32H7 have a clock enable for their flash;
only the dual-core.
For the st,stm32h7-flash-controller with "clocks" property, the driver
will enable the flash clock bit in the corresponding RCC register.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-11-04 13:41:46 -06:00
Gerson Fernando Budke
52d21d7bf0 soc: gd32: Drop PINCTRL from Kconfig.defconfig
This Kconfig has wrongly been added to defconfig files. It is not the
right place for it. It has never been the right place for it. Drivers
that need it should select the symbol in their Kconfig entries. Drop
PINCTL from Kconfig.defconfig and add proper select at Kconfig.gd32.

Fixes #78619

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-11-04 13:40:42 -06:00
Lars-Ove Karlsson
aaeaef0a1c drivers: flash: Removed a __packed attribute from struct jesd216_bfp
The struct jesd216_bfp was declared as __packed but later in the code
the address of a member was given to a non-packed pointer, potentially
causing reading of wrong addresses, and causing warnings with the
IAR ICCARM compiler.

After studying the JEDEC documentation JESD216F.02, section
6.4.2 JEDEC Basic Flash Parameter Header: 2nd DWORD, the struct must
be aligned to 4 so __packed is not necessary, just 4 byte alignment.

Signed-off-by: Lars-Ove Karlsson <lars-ove.karlsson@iar.com>
2024-11-01 13:54:30 -05:00
Declan Snyder
495a374a0d drivers: ethernet: ksz8081: RMII override RNB part
I for the life of me do not know what is going on here with the RNB chip
but it seems this override must be set in order for the chip to work,
regardless of strap-in configuration, and if not set explicitly, the
value after a reset for these two bits will be seemingly random and
inconsistent. And it was working before by luck before removing a second
redundant reset in a recent commit, because apparently the register
was getting the opposite of the reset value according to the datasheet
which makes it work. The result of these bits after reset seem to vary
depending on host mcu, board, debugger, number of times reset, type of
reset, and with a pinch of random chance after keeping all variables
seemingly the same, so let's just set it to the value that works
explicitly, even if it doesn't make sense. The bit here doesn't have
clear documentation but it seems it's for using RMII regardless of the
strap in option, which is what we want to do anyways if we know the
interface type from DT, so I think it's fine, considering it is making
this driver work again.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-11-01 13:54:00 -05:00
Declan Snyder
96877736e4 drivers: ethernet: ksz8081: Fix reset times
500 ms reset time is only for software reset and comes from IEEE spec.
Datasheet mentions for hardware reset the assertion of the signal should
only need to be 500 us, and 100 us after deassert to wait to access
programming interface.

Also remove an unused macro.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-11-01 13:54:00 -05:00
Gerard Marull-Paretas
b6d45423c6 drivers: serial: nrfx_uarte: set/clear pins retention
When GPD is managed by pinctrl, pins retention needs to be controlled by
the driver to avoid glitches.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-11-01 12:10:12 -05:00
Gerard Marull-Paretas
56c5b1e2da drivers: gpio: nrfx: add support for ports with pad on FAST_ACTIVE1
This patch allows to _safely_ configure GPIO ports that have their pad
on FAST_ACTIVE1 domain.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-11-01 12:10:12 -05:00
Gerard Marull-Paretas
9925ec99fd drivers: pinctrl: nrf: add flag to signal the FAST_ACTIVE1 peripherals
This patch introduces a new flag to indicate if a peripheral belongs
to FAST_ACTIVE1 domain. This way, pinctrl knows when to request the
SLOW_ACTIVE domain (where CTRLSEL multiplexer resides).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-11-01 12:10:12 -05:00
Mert Ekren
193eeaef0c drivers: pinctrl: max32: fix correct configuring drive strength
This commit fixes configuring pin drive strength in pinctrl driver.
Previously, there was a mismatch while filling pincfg and checking
pincfg drive strength field. This fix simplifies the operation and
avoids gpio driver header dependency.

Signed-off-by: Mert Ekren <mert.ekren@analog.com>
Co-Authored-By: Sadik Ozer <sadik.ozer@analog.com>
2024-10-31 14:18:38 -05:00
Damian Krolik
502c9ffb32 drivers: ieee802154_nrf5: skip Enh Ack conf for invalid short address
If the invalid short address (0xfffe) is specified,
configure the Enhanced Ack just for the extended address.
This is needed because Header IEs for Enhanced Ack must be
configured before the short address has been assigned to
the child.

Signed-off-by: Damian Krolik <damian.krolik@nordicsemi.no>
2024-10-31 09:24:03 -05:00
Chaitanya Tata
92985011b6 drivers: nrfwifi: Fix memory leak in TX path
During secure association, if we get any data packets from the
networking stack (as we switch off the dormancy) then they will be
dropped till the 802.1x port is authorized, but with recent changes the
corresponding network buffer isn't freed causing a memory leak.

Handle this case and free the network buffer (Using an OSAL API though
it's Zephyr to avoid duplication and also getting access to "struct
nwb");

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2024-10-30 09:43:41 -07:00
Fin Maaß
83c3b1c708 drivers: flash: spi_nor: simplify defines
simplify defines by using `DT_INST_**_OR` macros.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-10-30 09:43:18 -07:00
Fin Maaß
27aeabb5b2 drivers: flash: spi_nor: fix config struct
lots of values from the DT where not set corretly, if
`CONFIG_SPI_NOR_SFDP_RUNTIME` was
enabled. This fixes it.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-10-30 09:43:18 -07:00
Tomi Fontanilles
f380fcc52f drivers: modem_cellular: fix handling of +C*REG answers
`+C*REG:` may be received as AT read command answer
or unsolicited notification.
Their syntax differs, and even the overall parameter count varies
depending on what `<n>` is used in the `AT+CEREG=` write command.

To handle all cases properly, check the parameter count and
the presence of the `<tac>` parameter (which is a string and
thus begins with `"`) to figure out what is the position of `<stat>`.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2024-10-30 08:54:17 -05:00
Jordan Yates
c22233a1af net: nsos_sockets: free allocated socket on close
Free the socket object allocated in `nsos_socket_create` when closing
the socket.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2024-10-30 01:21:18 +00:00
Ian Morris
adced0c29b drivers: serial: fix renesas ra sci uart hardware flow control enable
Fixed typo in Renesas RA SCI UART configuration that was preventing
hardware flow control from being enabled.

Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
2024-10-29 16:01:38 -07:00
Fin Maaß
b8999973d3 drivers: spi: litex: add flush of rx buffer
this flushes the rx buffer before the
start of a new transaction. It is needed
because the litex bios is not always
reading the rx buffer.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-10-29 14:18:41 -05:00
Johan Carlsson
a3530d6a43 drivers: spi: mcux_flexcomm: use rxignore bit instead of dummy read.
when no rx data need to be read set the rxignore bits.
with this change the dma setup is faster and no unnecessary
dummy writes are done to memory.

Signed-off-by: Johan Carlsson <johan.carlsson@teenage.engineering>
2024-10-29 14:16:56 -05:00
Johan Carlsson
ff5afd8a9a drivers: spi: mcux_flexcomm: wait for specific dma tx status.
when sending multiple bytes only the DMA_STATUS_COMPLETE
status is interesting. otherwise the semaphore will be signaled twice.

Signed-off-by: Johan Carlsson <johan.carlsson@teenage.engineering>
2024-10-29 14:16:36 -05:00
Hao Luo
022c8ee1af drivers: gpio: ambiq: fix port status get error
It's not possible to get pinconfig of specific pin
in ambiq_gpio_port_get_raw function, change to use
OR value of RD and WT registers for one group of gpio.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-10-29 09:34:30 -07:00
Gerard Marull-Paretas
92c3495493 drivers: i2c: nrfx_twi[m]: default to I2C_BITRATE_STANDARD
Instead of forcing a definition in Devicetree. Right now, SoC DT files
contain this default, but it should not be part of SoC DT files.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-10-29 09:27:05 -07:00
Khoa Nguyen
b56d6e670e drivers: counter: fix AGT renesas prefix properties
- Modify the macro in source code AGT to get the right data from
device tree
- Modify name of agt node

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2024-10-29 07:11:04 -05:00
Krzysztof Chruściński
da53adfc56 drivers: serial: uart_async_to_irq: Fix uart_irq_tx_complete
uart_irq_tx_complete is implemented by z_uart_async_to_irq_irq_tx_ready
which changed recently (5bd53b6e2) to return positive value that may be
bigger than 1. uart_irq_tx_complete shall not return value bigger
than 1.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-10-29 07:10:08 -05:00
Dimitrije Lilic
5ee9d7a869 driver: sensor: adxl345: Bug fix for q31_t conv
This is a bug fix for adxl345_accel_convert_q31 functions.
Functions are used to convert samples received from
sensor to q31_t format when RTIO stream is used.

Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
2024-10-29 07:09:13 -05:00
Krzysztof Chruściński
ee1cbf063c drivers: serial: nrfx_uart: Fix poll_out for low baudrates
uart_poll_out had 1 ms timeout which is too short for lower baudrates.
Increase to 10 ms.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-10-29 07:07:27 -05:00
Sylvio Alves
685c6e42b8 driver: ble: add custom espressif kconfig
Adds ESP32 custom configurations for BLE driver.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-10-27 20:53:48 -05:00
Sylvio Alves
a70741bc82 west.yml: update hal_espressif to latest version
- Update GDMA and ADC drivers and remove deprecated entries.
- Rebased hal_espressif to latest bump sync.
- Added ESP Timer and Radio common config values

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-10-27 20:53:48 -05:00
Sylvio Alves
b5c53d6ac4 wifi: esp32: move kconfig to driver area
Make sure all kconfig related to Wi-Fi is
in its driver area.
This commit also removes esp_timer_init() call
from Wi-Fi driver.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-10-27 20:53:48 -05:00
Mathieu Choplain
c86f0ac6f3 drivers: adc: stm32: add STM32WB0 ADC
Add driver for ADC in STM32WB0 series.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-10-27 01:08:25 +02:00
Hao Luo
1e5cdb110a drivers: spi: Add SPI device support for Apollo3 SoCs
This commit adds spi device support for Apollo3 SoCs.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-10-26 11:31:11 +02:00
Savent Gate
4e879ab518 drivers: watchdog: wdt_dw: add missing header
Needs zephyr/irq.h to compile it.

Signed-off-by: Savent Gate <savent_gate@outlook.com>
2024-10-26 11:30:18 +02:00
Daniel Baluta
4f88301bc9 drivers: sai: Use 0x0 as clock id if none is provided
We use the name cell at a given index to retrieve
a clock's id.

But not all clocks provide a name cell, so use 0x0 as clock-id
for these situations.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2024-10-26 11:30:07 +02:00
Jilay Pandya
0687522cd4 drivers: stepper: introduce invert-direction property to gpio-stepper
This commit introduces invert-direction property to gpio-stepper

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2024-10-26 11:29:57 +02:00
Jilay Pandya
367f853a4c drivers: stepper: rename compatible of gpio-stepper
This commit fixes minor copyright issues and corrects the compatible of
gpio-stepper with the vendor name as zephyr

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2024-10-26 11:29:57 +02:00
Alberto Escolar Piedras
9a50c10b34 drivers/wifi/winc1500: Fix build warnings with 64bit targets
Fix a set of warnings like:
drivers/wifi/winc1500/wifi_winc1500.c:332:25: error: cast from pointer
to integer of different size [-Werror=pointer-to-int-cast]
  332 |         SOCKET socket = (int)context->offload_context;

when int and void* do not have the same size, by casting the content
of context->offload_context to intptr_t which is whichever integer
size matches the pointer size.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-10-26 11:29:46 +02:00
Ben Booher
4a8a035bd7 drivers: sensor: dacx3608: add broadcast register for synchronized output
The dacx3608 line supports a broadcast register so all configured channels
can output a singular value, simultaneously. This drastically reduces I2C
overhead when using multi-channel control. An API addition was necessary
to support a global broadcast channel number. The API addition does not
break the write_value() implementation for other DAC drivers in the repo.
This change is based on an out-of-tree driver developed internally to
handle this use case.

Alternative to the API change, could be a KConfig option or device tree
entry. Also, no support for the Broadcast channel was added to the
channel_setup() implementation - this may or may not be confusing. I
believe it makes sense to maintain explicit setup calls for each channel
intended to be configured.

Signed-off-by: Ben Booher <benbooher@pull-repo.com>
2024-10-26 03:59:35 +01:00
Emilio Benavente
4d77aa1eff drivers: clock_control: syscon: Added Clock support for IRTC.
Added Clock Support code for the MCXN947 when IRTC is enabled.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-10-26 03:58:48 +01:00
Emilio Benavente
ca3041f11a drivers: rtc: Added IRTC Driver Support.
Added NXP IRTC Driver support and binding.
This driver is expected for users needing
Time Date info in their application.
The driver additionally has an alarm mode that
can be enabled to fire an intterupt when the time
and alarm values match.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-10-26 03:58:48 +01:00
Bill Waters
abca729367 driver: pwm: infineon: cyw920829m2evk_02 pwm
- Enable PWM for the cyw920829m2evk_02 board

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2024-10-26 03:57:41 +01:00
Raffael Rostagno
d33b8f6314 drivers: counter: rtc: esp32: Limit minimum time for set_alarm
Include value of 30 us as not valid to set alarm for RTC counter.
Change included to allow RTC timer to be properly set to use
RC_FAST_D256 as clock source.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-10-26 03:57:23 +01:00