The galileo board no longer needs an extern of the initalize
routine once we've moved the process to the actual file.
Change-Id: I21a0748729b2435a368e28b3a2744b2089ed1e13
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Adding in dependency of GROVE_DEBUG to the GROVE configuration
option being set
Change-Id: I4108e619254ca3cde2b96de595e1b8300fe6a752
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
XIOAPIC_DIRECT_ADDRESSING and IOAPIC_MSI_REDIRECT are never
set and not tied to any config options.
Change-Id: Ib64cd198c99fe670eb5bcd946ce93f616c03d12a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The \NOMANUAL tag is a remnant from days of yore and is no longer
needed or useful. Cleaning up the code references to this.
Change-Id: I1b8cc9c9560d1dbb711f05fa63fd23386789875c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
This was only needed for the older 8259A style PICs which are no
longer supported.
Since we now just support APIC, we always just call loapic_eoi which
no longer requires an argument and informs the IOAPIC that the interrupt
is complete if necessary.
Change-Id: I15c9b7b4f03b872656220af32220b62e043bfa6b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
SPI port 1 needs the pinmuxer to be initialized first. Or then, all
modifications required from the CS GPIO logic won't apply.
Change-Id: Ibe4b2d4096065a9add23373075090d5e8a014650
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
As for the SPI port 0, SPI port 1 needs a GPIO pin to emulate the CS.
Change-Id: I00911cd25c3fa0ae17a02ee6f43cbea7f4fbcca2
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Obviously it's '&' and not '&&'.
Change-Id: I9bb9fee80a67697e8ea62bb001af1b72f5a356e6
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The I2C1 device is currently using the older device initialization
method, and thus will not work.
Change-Id: If193f20275262abc3b08edd3a26679ae9ad39d94
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Convering the intel_spi to use the updated device model
Change-Id: I016822aeecaf707ffa31b57b4e51e99262fce0e5
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The kernel configuration option SHARED_IRQ_1_PRI is dependent upon
SHARED_IRQ_1, not SHARED_IRQ_0.
Change-Id: I018cd8e860c362572cdde8586e50aed990d350bc
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Changes the default IRQ priority level from 0 to 2 for the following
kernel configuration options as priorities 0 and 1 are reserved for the
first 32 IDT entries.
SHARED_IRQ_0_PRI
SHARED_IRQ_1_PRI
I2C_DW_0_INT_PRIORITY
GPIO_DW_0_PRI
GPIO_DW_1_PRI
SPI_INTEL_PORT_0_PRI
SPI_INTEL_PORT_1_PRI
Change-Id: I0fc821c68156eb1e1fe776b2bd4ff5890bba40e8
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This patch corrects gpio_dw_setup to use the MMIO base address
determined by PCI enumeration when that enumeration feature is enabled
instead of always using the default base address specified at compile
time.
Change-Id: If139c40ce30275694e01196a4a4aa529cd714f06
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Change-Id: I7e920e6de8f4b7a726c03c05edea3cbac69eb374
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I2276676142deea21cf8079449ce153f2fb887a8e
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I34a54230bc4a63c8a4391d03ff530835910c3705
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I819d13f0d7a23e3a61dcda6a3ced18810b192158
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I6e3dc44be7bb6d01a7181d8c8e90cdb72120c3db
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I2298add2399559d95c75a90c045286046372b7e0
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Moving many of the functions from the old format of inline comments to
the newer doxygen format.
Change-Id: Ib0fe0d8627d7cd90219385a3ab627da8f9637d98
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
If console handler is defined uart console should also be defined.
Change-Id: I3efcc6c837f8f1621340f7f13bf0603d7dc42fb2
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Only driver specific public headers should be found in include/drivers.
All generic API are found in include/ directory.
Change-Id: Ic50931987bb9460fd4a3843abc6f5de107faf045
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
With ioapic_mkstub now taking a context value we can have a single isr
routine and move away from the isr trampolines we have now
Change-Id: Ibbb0f627ac515b12c0590a71da6a3267c952dd30
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Add a context value to the ioapic and loapic mkstub macros to allow
the developer to specify a context value that will be passed on the
stack to the interrupt service routines.
All the invocations for the loapic_mkstub and ioapic_mkstub macros
have been changed to pass in 0 so there is no functional difference
ATM. This change removes the need for drivers to have trampoline ISR
routines to pass a context vaule to their generic ISR routine.
This is the first step in getting rid of the hack where the driver
needs to look into the __initconfig_* linker objects.
Change-Id: I2c5eaa20d8cb5a42ef445762c426854be32c8452
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
In order to have drivers that are usable cross architecture the
signature for IRQ_CONFIG needs to be the same to avoid #ifdef hell in
the driver code based on architecture.
Update the macro and it usage for existing drivers
Change-Id: I22e142b21d4e984add231d1dbd97020e4823985f
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I8f51f861e2250c87c296b697ef5b6610ce644b34
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
checkpatch currently reports several files failing the C99 comment
verification. Cleaning these up now.
Change-Id: I35766c1f6c88a280c5e844b3f02668d6e1ad11d2
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Naming convention of the OS requires the use of underscores (_) for
filenames instead of dashes (-).
Change-Id: I62b615f1f336e839cbbef2c3721c1926afe76457
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Naming convention states we should be using an underscore (_) for
filenames not a dash (-).
Change-Id: I51a6ae02957bfc556b8718aae713636bd14c8b2c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
The naming convention is to use underscores (_) and not dashes (-)
within the filename.
Change-Id: I678cf01306d72a905ed7b161af116c6e4a2cd39c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
The naming convention used in the source is for there to be an
_ and not a - in the file. Fixing GPIO to be consistent with
the os naming conventions.
Change-Id: Ifc4356c14b52e2cc2411a7445b44c7cb57d2765c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Naming convention uses the _ not - in the file names. In a recent
commit for I2C this for some reason changed. Making the names now
more consistent with other files.
Change-Id: I1e363c0c09ae0c8b2ac3def3beeaaeafcc01eb74
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Change the new files from Intel in BSD-3 to Apache 2.0
Change-Id: Ica4b455e9cb8134889f2a88e2d96094ce7093734
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Gets rid of the trailing initialization level character from the
name of the device variable generated by the macro, since it serves
no useful purpose. (The linker scripts place the various initialization
sections in ascending order based on the name of the section, so there
is no need to embed the initialization level in the variable name itself.)
Change-Id: I56bb79a513b8f77fb1f3fbaccec14454c2520772
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Initial import of the Grove LCD I2C controller. Data sheet can
be found at:
http://www.seeedstudio.com/wiki/images/0/03/JHD1214Y_YG_1.0.pdf
[DL: Updated command sequence according to datasheet.]
Change-Id: Id1b491f8dce346769dc42c41fac0ea3aabe3950a
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
GPIO driver is initialized at pre-kernel-late level, if SPI does it too,
it will happen before GPIO (depends on the ordered list of
initialization). In order to ensure it gets GPIO initialized always
before SPI, let's set SPI to initalize at the next level: nano-early.
Change-Id: I6e34168c88fca0187a809bf5c7971492bd5acb5c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Change all the Intel and Wind River code license from BSD-3 to Apache 2.
Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
It's an SPI driven chip and proposes up to 8 channels for input
conversion. It's found on Galileo board.
Change-Id: I916367e9be0849812c6a509082a501730a01ce60
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
