adc: Adding driver for TI's adc108s102 chip
It's an SPI driven chip and proposes up to 8 channels for input conversion. It's found on Galileo board. Change-Id: I916367e9be0849812c6a509082a501730a01ce60 Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka
Anas Nashif
parent
935eedeedf
commit
5bcdfbe255
4 changed files with 429 additions and 0 deletions
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@ -46,3 +46,51 @@ config ADC_DEBUG
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default n
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help
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Enable debug output for ADC drivers
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config ADC_TI_ADC108S102
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bool "TI adc108s102 chip driver"
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depends on ADC
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select SPI
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default n
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help
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Enable support for TI's ADC chip adc108s102 driver.
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config ADC_TI_ADC108S102_0
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bool "First instance of TI's adc108s102 chip"
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depends on ADC_TI_ADC108S102
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default n
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help
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Enalbe first instance of adc108s102 driver.
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config ADC_TI_ADC108S102_0_DRV_NAME
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string "Driver's name"
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depends on ADC_TI_ADC108S102_0
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default "adc108s102_0"
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config ADC_TI_ADC108S102_0_SPI_PORT_NAME
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string "Master SPI port name"
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depends on ADC_TI_ADC108S102_0
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default ""
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help
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Master SPI port name through which adc108s102 chip is accessed.
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config ADC_TI_ADC108S102_0_SPI_CONFIGURATION
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hex "Master SPI port configuration"
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depends on ADC_TI_ADC108S102_0
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default 0x0
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help
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Master SPI port configuration flags used to access adc108s102 chip.
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config ADC_TI_ADC108S102_0_SPI_MAX_FREQ
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int "Master SPI port max frequency"
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depends on ADC_TI_ADC108S102_0
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default 0
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help
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Master SPI port maximum frequency used to access adc108s102 chip.
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config ADC_TI_ADC108S102_0_SPI_SLAVE
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int "SPI slave slot"
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depends on ADC_TI_ADC108S102_0
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default 0
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help
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adc108s102 chip's SPI slave number on master SPI port.
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@ -0,0 +1 @@
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obj-$(CONFIG_ADC_TI_ADC108S102) += adc-ti-adc108s102.o
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306
drivers/adc/adc-ti-adc108s102.c
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306
drivers/adc/adc-ti-adc108s102.c
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@ -0,0 +1,306 @@
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/* adc-ti-adc108s102.c - TI's ADC 108s102 driver implementation */
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/*
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* Copyright (c) 2015 Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <nanokernel.h>
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#include <misc/util.h>
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#include <string.h>
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#include <init.h>
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#include <adc-ti-adc108s102.h>
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#ifndef CONFIG_ADC_DEBUG
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#define DBG(...) { ; }
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#else
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#if defined(CONFIG_STDOUT_CONSOLE)
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#include <stdio.h>
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#define DBG printf
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#else
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#include <misc/printk.h>
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#define DBG printk
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#endif /* CONFIG_STDOUT_CONSOLE */
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#endif /* CONFIG_ADC_DEBUG */
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static void _ti_adc108s102_sampling(int data, int unused)
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{
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struct device *dev = INT_TO_POINTER(data);
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struct ti_adc108s102_data *adc = dev->driver_data;
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ARG_UNUSED(unused);
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DBG("Sampling!\n");
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/* SPI deals with uint8_t buffers so multiplying by 2 the length */
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spi_transceive(adc->spi,
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(uint8_t *) adc->cmd_buffer,
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adc->cmd_buf_len*2,
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(uint8_t *) adc->sampling_buffer,
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adc->sampling_buf_len*2);
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}
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static void _ti_adc108s102_completed(struct device *dev,
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enum adc_callback_type cb_type)
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{
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struct ti_adc108s102_data *adc = dev->driver_data;
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adc->seq_table = NULL;
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adc->cb(dev, cb_type);
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}
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static inline void _ti_adc108s102_handle_result(struct device *dev)
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{
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struct ti_adc108s102_data *adc = dev->driver_data;
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struct adc_seq_table *seq_table = adc->seq_table;
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struct ti_adc108s102_chan *chan;
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struct adc_seq_entry *entry;
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uint32_t s_i, i;
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DBG("_ti_adc108s102_handle_result()");
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for (i = 0, s_i = 1; i < seq_table->num_entries; i++, s_i++) {
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entry = &seq_table->entries[i];
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chan = &adc->chans[entry->channel_id];
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if (entry->buffer_length - chan->buf_idx == 0) {
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continue;
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}
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*((uint16_t *)entry->buffer+chan->buf_idx) =
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sys_be16_to_cpu(adc->sampling_buffer[s_i]);
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chan->buf_idx += 2;
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}
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}
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static int32_t _ti_adc108s102_prepare(struct device *dev)
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{
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struct ti_adc108s102_data *adc = dev->driver_data;
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struct adc_seq_table *seq_table = adc->seq_table;
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struct ti_adc108s102_chan *chan;
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int32_t sampling_delay = 0;
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uint32_t i;
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adc->cmd_buf_len = 0;
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adc->sampling_buf_len = 1;
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for (i = 0; i < seq_table->num_entries; i++) {
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struct adc_seq_entry *entry = &seq_table->entries[i];
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/* No more space in the buffer? */
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chan = &adc->chans[entry->channel_id];
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if (entry->buffer_length - chan->buf_idx == 0) {
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continue;
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}
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adc->cmd_buffer[adc->cmd_buf_len] =
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ADC108S102_CHANNEL_CMD(entry->channel_id);
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adc->cmd_buf_len++;
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adc->sampling_buf_len++;
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sampling_delay = entry->sampling_delay;
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}
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if (adc->cmd_buf_len == 0) {
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/* We are done */
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_ti_adc108s102_completed(dev, ADC_CB_DONE);
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return 0;
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}
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/* dummy cmd byte */
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adc->cmd_buffer[adc->cmd_buf_len] = 0;
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adc->cmd_buf_len++;
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/* 64bits timestamp */
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adc->sampling_buf_len += 4;
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DBG("ADC108S102 is prepared...");
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return sampling_delay;
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}
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static inline void _ti_adc108s102_run_with_delay(struct device *dev,
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int32_t delay)
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{
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struct ti_adc108s102_data *adc = dev->driver_data;
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fiber_delayed_start(adc->sampling_stack,
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ADC108S102_SAMPLING_STACK_SIZE,
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_ti_adc108s102_sampling,
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POINTER_TO_INT(dev), 0,
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0, 0, delay);
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}
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static void _ti_adc108s102_spi_cb(struct device *spi_dev,
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enum spi_cb_type cb_type,
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void *user_data)
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{
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struct device *dev = user_data;
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int32_t delay;
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DBG("_ti_adc108s102_spi_cb(%d)\n", cb_type);
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switch (cb_type) {
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case SPI_CB_WRITE: /* fall through */
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case SPI_CB_READ: /* fall through */
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case SPI_CB_TRANSCEIVE:
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_ti_adc108s102_handle_result(dev);
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delay = _ti_adc108s102_prepare(dev);
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_ti_adc108s102_run_with_delay(dev, delay);
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break;
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case SPI_CB_ERROR: /* fall through */
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default:
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_ti_adc108s102_completed(dev, ADC_CB_ERROR);
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break;
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}
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}
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static void ti_adc108s102_enable(struct device *dev)
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{
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/* There is nothing to be done. If there is no sampling going on,
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* the chip will put itself on power-saving mode (that is because
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* SPI will release CS) */
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}
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static void ti_adc108s102_disable(struct device *dev)
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{
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/* Same issue as with ti_adc108s102_enable() */
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}
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static void ti_adc108s102_set_callback(struct device *dev, adc_callback_t cb)
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{
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struct ti_adc108s102_data *adc = dev->driver_data;
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adc->cb = cb;
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}
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static inline int _verify_entries(struct adc_seq_table *seq_table)
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{
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struct adc_seq_entry *entry;
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uint32_t chans_set = 0;
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int i;
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for (i = 0; i < seq_table->num_entries; i++) {
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entry = &seq_table->entries[i];
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if (entry->sampling_delay <= 0 ||
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entry->channel_id > ADC108S102_CHANNELS) {
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return 0;
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}
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if (!entry->buffer_length) {
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continue;
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}
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chans_set++;
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}
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return chans_set;
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}
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static int ti_adc108s102_read(struct device *dev,
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struct adc_seq_table *seq_table)
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{
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struct ti_adc108s102_config *config = dev->config->config_info;
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struct ti_adc108s102_data *adc = dev->driver_data;
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struct spi_config spi_conf;
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spi_conf.config = config->spi_config_flags;
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spi_conf.max_sys_freq = config->spi_freq;
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spi_conf.callback = _ti_adc108s102_spi_cb;
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if (spi_configure(adc->spi, &spi_conf, dev)) {
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return DEV_FAIL;
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}
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if (spi_slave_select(adc->spi, config->spi_slave)) {
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return DEV_FAIL;
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}
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/* Resetting all internal channel data */
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memset(adc->chans, 0, ADC108S102_CHANNELS_SIZE);
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if (_verify_entries(seq_table) == 0) {
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return DEV_INVALID_CONF;
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}
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adc->seq_table = seq_table;
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/* Requesting sampling right away */
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_ti_adc108s102_prepare(dev);
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_ti_adc108s102_sampling(POINTER_TO_INT(dev), 0);
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return DEV_OK;
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}
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struct adc_driver_api ti_adc108s102_api = {
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.enable = ti_adc108s102_enable,
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.disable = ti_adc108s102_disable,
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.set_callback = ti_adc108s102_set_callback,
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.read = ti_adc108s102_read,
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};
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int ti_adc108s102_init(struct device *dev)
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{
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struct ti_adc108s102_config *config = dev->config->config_info;
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struct ti_adc108s102_data *adc = dev->driver_data;
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adc->spi = device_get_binding((char *)config->spi_port);
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if (!adc->spi) {
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return DEV_NOT_CONFIG;
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}
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DBG("ADC108s102 initialized\n");
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dev->driver_api = &ti_adc108s102_api;
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return DEV_OK;
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}
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#ifdef CONFIG_ADC_TI_ADC108S102_0
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struct ti_adc108s102_data adc108s102_0_data;
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struct ti_adc108s102_config adc108s102_0_config = {
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.spi_port = CONFIG_ADC_TI_ADC108S102_0_SPI_PORT_NAME,
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.spi_config_flags = CONFIG_ADC_TI_ADC108S102_0_SPI_CONFIGURATION,
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.spi_freq = CONFIG_ADC_TI_ADC108S102_0_SPI_MAX_FREQ,
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.spi_slave = CONFIG_ADC_TI_ADC108S102_0_SPI_SLAVE,
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};
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DECLARE_DEVICE_INIT_CONFIG(adc108s102_0, CONFIG_ADC_TI_ADC108S102_0_DRV_NAME,
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ti_adc108s102_init, &adc108s102_0_config);
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nano_early_init(adc108s102_0, &adc108s102_0_data);
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#endif /* CONFIG_ADC_TI_ADC108S102_0 */
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74
drivers/adc/adc-ti-adc108s102.h
Normal file
74
drivers/adc/adc-ti-adc108s102.h
Normal file
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@ -0,0 +1,74 @@
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/* adc-ti-adc108s102.h - Private */
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/*
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* Copyright (c) 2015 Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
|
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ADC108S102_PRIV_H__
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#define __ADC108S102_PRIV_H__
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#include <spi.h>
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#include <adc.h>
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#include <misc/byteorder.h>
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/* 8 chans maximum + 1 dummy, 16 bits per-chans -> 18 bytes */
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#define ADC108S102_CMD_BUFFER_SIZE 9
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/* 17 maximum dummy bytes + 16 result bytes maximum + 4 timestamp bytes */
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#define ADC108S102_SAMPLING_BUFFER_SIZE 13
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#define ADC108S102_SAMPLING_STACK_SIZE 128
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#define ADC108S102_CHANNELS 8
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#define ADC108S102_CHANNELS_SIZE \
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(ADC108S102_CHANNELS * sizeof(uint32_t))
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#define ADC108S102_CHANNEL_CMD(_channel_) \
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sys_cpu_to_be16((_channel_ << 8) << 3)
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struct ti_adc108s102_config {
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const char *spi_port;
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uint32_t spi_config_flags;
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uint32_t spi_freq;
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uint32_t spi_slave;
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};
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struct ti_adc108s102_chan {
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uint32_t buf_idx;
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};
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struct ti_adc108s102_data {
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char __stack sampling_stack[ADC108S102_SAMPLING_STACK_SIZE];
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uint16_t cmd_buffer[ADC108S102_CMD_BUFFER_SIZE];
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uint8_t cmd_buf_len;
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uint16_t sampling_buffer[ADC108S102_SAMPLING_BUFFER_SIZE];
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uint8_t sampling_buf_len;
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struct device *spi;
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struct ti_adc108s102_chan chans[ADC108S102_CHANNELS];
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struct adc_seq_table *seq_table;
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adc_callback_t cb;
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};
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#endif /* __ADC108S102_PRIV_H__ */
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