This belongs in the implementation file that references the array, since
the header is included in multiple files.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Setting bit 3 instead of bit 2 modifies a reserved section of the
register, with the impact that the ODR is not as configured.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Convert apa102 led_strip driver to use new defines so we can remove
the dts_fixup.h code for it.
Also update the driver to set the slave spi address as specified by the
device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Align ieee802154_nrf5 driver to a new radio driver API.
Utilize new radio driver features (CCA).
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The SAM E70 GMAC ethernet driver reference a packet with net_pkt_ref()
when queueing a packet, and unreference it with net_pkt_unref() in the
ISR when it has been fully sent.
The call to net_pkt_ref() is done just after re-enabling the
interruptions, so there is however a small race condition that might
cause the packet to be unreference before being referenced. This is
only theoretical and has not been seen in practice.
Fix that by moving the call to net_pkt_ref() just before re-enabling
the interruptions.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The previous commit replaced the net_pkt element ref with an element
atomic_ref. CI tests turned up more places where ref was used directly.
This commit converts them to use the new element.
Signed-off-by: Daniel Glöckner <dg@emlix.com>
For some reason, there was sequence like:
1. Get size of RX packet.
2. Allocate pkt buffer.
3. Check if the size of RX packet is too large, then deallocate pkt
buffer and error out.
Instead, reorder operations to check size before allocating buf.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Adds a new config HAS_MCUX_ENET to constrain which socs can enable the
mcux ethernet driver. This will prevent users from enabling the driver
on socs like kl25z or kw41z which do not have ethernet mac hardware.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This driver supports ST Microelectronics digital pdm microphones
(MPxxDTyy) connected through different peripherals. Currently only
I2S is supported.
The driver makes use internally of the OpenPDM2PCM library
to convert the PDM audio stream to PCM. Currently the
oversampling factor is fixed to 64.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use auto-generated device tree macros in LIS3MDL driver to avoid
usage of dts.fixup code for it.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use auto-generated device tree macros in LIS2MDL driver to avoid
usage of dts.fixup code for it.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use auto-generated device tree macros in LSM6DSL driver to avoid
usage of dts.fixup code for it.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Added UART4 alternate pin function for L4 µC for PC10 and PC11.
Corrected naming of previously defined UART4 TX and RX defines.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Moved UART interrupt dependencies from concrete driver to
the modem receiver as it uses UART interrupt functions within.
This allows developing other UART interrupt based modems without
the need to depend on the aforementioned features explicitly.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Add a level 2 interrupt controller for the RV32M1 SoC. This uses the
INTMUX peripheral.
As a first customer, convert the timer driver over to using this,
adding nodes for the LPTMR peripherals. This lets users select the
timer instance they want to use, and what intmux channel they want to
route its interrupt to, using DT overlays.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Mike Scott <mike@foundries.io>
Add a Peripheral Clock Controller (PCC) driver. This gates and ungates
clocks to various peripherals on the SoC.
Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
The OpenISA RV32M1 SoC has four CPU cores. Two of these are RISC-V
32-bit cores, which are named "RI5CY" and "ZERO-RISCY". (The other two
cores are ARM Cortex-M0+ and -M4.) This patch adds basic SoC
enablement for the RISC-V cores:
- basic dtsi, to be extended as additional drivers are added
- SoC definition in soc/riscv32/openisa_rv32m1 for RI5CY / ZERO-RISCY
- system timer driver for RI5CY, based on LPTMR0 peripheral
The timer driver will be generalized a bit soon once proper
multi-level interrupt support is available.
Emphasis is on supporting the RI5CY core as the more capable of the
two; the ZERO-RISCY SoC definitions are a good starting point, but
additional work setting up a dtsi and initial drivers is needed to
support that core.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
Some extensions to the multi-level interrupt controller are required
to support SoCs with more than four level 2 interrupt "aggregators".
Extend existing support to allow at most 8 level 2 or level 3
aggregators. Use Kconfig macro templates to cut down on boilerplate.
Try to clarify some aspects of the Kconfig help while we're at it, and
change the type of options which count things or are table offsets
from "hex" to "int", so that the generated .config is easier to read.
Finally, make some improvements to gen_isr_tables.py while we are
here. In particular, move some assignments around to cut down on
duplicated work, don't check for symbols we know must exist, and
improve the debug logging output's readability.
Signed-off-by: Marti Bolivar <marti@foundries.io>
It's not an error if a driver does not implement callback related
function. Let's return -ENOTSUP relevantly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It needs to verify if the callback was not already installed, and if so:
if is was in controller's list.
It should return an error in case the node is not found though it was
requested to be removed.
If already inserted, it will be silently removed but added again, to
avoid circular list as stated in the bug.
Fixes#11394
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Complete code factorization in stm32 exti drivers.
Add return value in case line is not implemented.
Except returned error code, refactor has been done iso-feature
compared to previous code. Hence error is reported only when
support was not available on previous series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use Kconfig named choice for TRIGGER_MODE in order to easy
up the trigger mode selection in default configurations
for boards using this sensor driver.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The PLLR parameter in LL_RCC_PLLI2S_ConfigDomain_I2S() API should
be selected among the following list of (already shifted) values:
* @arg @ref LL_RCC_PLLI2SR_DIV_2
* @arg @ref LL_RCC_PLLI2SR_DIV_3
* @arg @ref LL_RCC_PLLI2SR_DIV_4
* @arg @ref LL_RCC_PLLI2SR_DIV_5
* @arg @ref LL_RCC_PLLI2SR_DIV_6
* @arg @ref LL_RCC_PLLI2SR_DIV_7
This commit fixes PR #12609.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We now generate CS GPIO defines from the DTS that we can utilize. We
needed to slightly update the #defines in the driver from:
DT_MICROCHIP_ENC28J60_0_CS_GPIOS_{PIN,CONTROLLER} to
DT_MICROCHIP_ENC28J60_0_CS_GPIO_{PIN,CONTROLLER}
Fixes#12640
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Share lis2dh driver among few accelerometer sensors that has
same register interface: LIS2DH, LIS3DH, LSM303DLHC, LIS2DH12,
LSM303AGR.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use auto-generated device tree macros in LIS2DH driver to avoid
usage of dts.fixup files. The triggered interrupt part has been
slightly hacked to automatically understand whether only int1 is
configured or both int1 and int2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Move to using the generated DT_INVENTEK_ESWIFI_ESWIFI0_CS_GPIO_pin and
DT_INVENTEK_ESWIFI_ESWIFI0_CS_GPIO_CONTROLLER defines and drop the
DT_ESWIFI0_CS_GPIOS_PIN & DT_INVENTEK_ESWIFI_ESWIFI0_CS_GPIO_PIN from
dts_fixup.hl
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Not necessary with gcc, and Zephyr is inconsistent about using the
qualifier, but making the intent explicit is a good thing.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The existing implementation of z_clock_set_timeout() calculates the
compare value based on a complex series of operations including an
unconditional integer division and multiplication intended to ensure the
compare value is aligned to a tick boundary. On the nRF51 this division
requires a call to an outline function with a data-dependent execution
time.
In the common case where the timeout is set less than one tick past the
last observed tick the devision can be elided, as can several extra
operations intended to deal with fractional ticks.
The code also failed to account for a ticks-per-cycle that violated the
minimum delay required to guarantee a compare value would result in a
match without wrapping. The minimum delay was also unreasonably long
(about 1 ms). Reduce it to a more reasonable value to allow for a
higher ticks-per-second, and diagnose attempts to set the tick frequency
above the supported maximum (8192 Hz).
Finally, move the parts of the compare calculation that are not
dependent on the live counter value out of the locked region.
Prior to this change the observed time between the irq_lock() and
irq_unlock() in z_clock_set_timeout() on the nRF51 ranged between 5 us
and 8 us.
With the revised algorithm the observed lock duration is between 2.16 us
(1024 Hz) and 2.88 us (100 Hz) in the common case that the compare is
set within the current tick. If the compare is set late the duration
will be higher, but no greater than the previous implementation.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The RTC COUNTER register doesn't care that it receives a value larger
than it can hold; it'll discard the bits internally. No need to spend
cycles doing it manually.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
spinlock gains us nothing on an architecture that doesn't support SMP.
Use the standard irq_lock() API so when we search for conditions that
may decrease ISR responsiveness we can find them.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Some of the events from USBD peripheral (i.e. cable disconnect)
were handled in IRQ context and some of them (i.e. ep r/w events) in
system workqueue (inherited from initial driver implementation).
This may lead to race condition in some specific situations.
Currently, all of the events are enqueued in ISR and processed in
workqueue. Driver is reinitialized on queue overflow and queue size
is configurable in KConfig.
Fixes#12016
Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
Supported PWM at pins A0, D3, D5 and D6 which are also Arduino
compatible. Also the onboard red LED can be used with PWM.
The basic/{fade_led, blink_led} samples to apply to this board
seemlessly and operate on the onboard red LED.
Also supported RTC.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
