This commit fixes the flash latency calulation in clock_control_init
for stm32wb and stm32wl series:
For these series new_hclk_freq can't be used to set the flash latency,
because the flash clk uses a different prescaler.
Without this fix, the flash latency could be set to an inadequat value
in cases wehere the new AHB3/AHB4 prescaler is different from the
new cpu1 prescler.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds missing initialization of rcc prescalers for
stm32wb and stm32wl series when hse or hsi are selected as
system clock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
stm32wb only has a single msi clock range, in contrast to wl, l4, l5
which have a second range that is active after exit from standby mode.
This difference must be taken account of in the driver.
This commit abstracts __LL_RCC_CALC_MSI_FREQ macro such that all series
can be supported, additionally the switch to the msirange
(LL_RCC_MSI_EnableRangeSelection) is now only executed on series
that support it.
As a result stm32wb socs can use msi as sysclock.
The same should be done for stm32l0, but this commit series limits
the scope of socs to avoid getting too bloated.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commmit restructures the clock_controller code such that the cpu2
prescler assignment later can be excluded for single core socs.
The stm32wl mcu line has variants with a single cortex-m4 core
(stm32wle5), therefore the prescaler for the second clock should
only be set for dual core socs.
This commit still checks for the complete series
(CONFIG_SOC_SERIES_STM32WLX) as the single core variants are not
yet introduced, later the condition should check for a flag like
CONFIG_SOC_STM32WL5X instead.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit fixes several occurences where a struct members is wrongly
dereferenced, which causes a compile error in case the msi clock is used
as system clock.
Only affects stm32wb and stm32wl with MSI selected as sysclock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit continues simplifying the generation of
isActiveFlag/clearFlag funtion pointer array for the request generators
and does the same for the table_ll_channel.
Additionally move struct dmamux_stm32_channel to c file.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit uses dt property dma-channels instead of ll defines to
make sure every soc has correct number of function pointers defined.
While commit 5f6218a tried to fix this for g0 series, this caused
regression for other series(e.g. stm32g431). Using UTIL_LISTIFY and
dt properties this should finally be fixed and reduce boilerplate code.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
NRFX UARTE would write to user supplied buffer on IRQ without checking
whether or not the supplied buffer had available space left to write
one char
Signed-off-by: Arne Edholm <arne.edholm@assaabloy.com>
In prts of the code, we use rcc node "clocks" property to testify the
use of device tree for clocks configuration.
This doesn't work in case of stm32h7 m4 targets as for those,
"upstream rcc" clock configuration, such as sysclk source selection,
is done on m7 core and hence rcc node doesn't have a "clocks"
property.
To work around this, use alternate "d1cpre" property in case of
stm32h7 targets.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Cortex-M4 stm32mp1 zephyr relies on chip Cortex-A for clock
configuration.
No change is then required for conversion to dts based clocks
configuration, but we do need to exclude use of newly deprecated
Kconfig symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add new symbol CLOCK_CONTROL_STM32_HAS_DTS to exclude definition
of other CLOCK_CONTROL_STM32_* symbols when dts based configuration
is in use.
CLOCK_CONTROL_STM32_HAS_DTS is defined based on availability of
"clocks" property in rcc node.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Symbol CLOCK_STM32_HSE_CLOCK will remain in use in context of stm32
clock_control configuration using device tree, cf commit
a7989f64a3.
In preparation for next change, separate it from the others symbols
definition. Also make it non dependent from other Kconfig symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If modem receives an IPv6 address, buffer overrun
would occur. Fix this by checking string length to
ensure what type of IP address needs to be parsed.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
device_pm_control_nop has been marked deprecated so we get a CI
build error due to its use. Replace with NULL to fix the issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change to make i2s_config const missed a case in the SAM driver.
Without this we get build errors when building in CI.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove the config BOOT_TIME_MEASUREMENT and corresponding #ifdef'd code
throughout (kernel/init.c, idle.c, core/common.S , reset.S, ... ) which
hold the extern hooks for z_timestamp_main and z_timestamp_idle in the
removed boot_time test suite.
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
The current rf2xx driver not implement any configuration. Add
the minimal structre to implement rf2xx driver configuration and
implement IEEE802154_CONFIG_PROMISCUOUS mode.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Configure transceiver to create a 0 period backoff and perform only one
time the CCA without transmission retires for failures.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current RF2XX driver only support IEEE802154_TX_MODE_CSMA_CA. Add
IEEE802154_TX_MODE_DIRECT to allow transmit packets immediately without
performing random backoff, CCA and retransmission process.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The MAX17262 is an ultra-low power fuel-gauge IC which implements the
Maxim ModelGauge m5 algorithm. The IC monitors a single-cell battery
pack and supports internal current sensing for up to 3.1A pulse
current. The IC provides best performance for batteries with 100mAhr
to 6Ahr capacity.
Signed-off-by: Matija Tudan <mtudan@mobilisis.hr>
This is always defined since:
755d09e149 include/drivers/clock_control: stm32: Update for STM32F1
support
So the condition has currently no effect and causes the prescaler to
always be set to /2.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This commit implements the OpenThread APIs to pass MAC keys and
frame counter to the radio layer in order to process the
transmission security. This is needed for the correct functioning
of a CSL transmitter.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
This commit aligns iis2dlpc sensor driver to latest multi
instance sensor driver model.
In particular:
1. make use of some few DT helpers:
- get bus devices with DEVICE_DT_GET
- get SPI information with SPI_CONFIG_DT_INST
- get drdy gpios with GPIO_DT_SPEC_GET
2. make use of the stmemsc common routines and move ctx
handler inside struct config, so that the bus_init
routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The STM32H7x flash has an integrated ECC that can correct single
errors and detect double errors. When a double ECC error is detected,
the DBECCERR1/2 flag is raised and there is a bus fault.
We now mask this bus fault and check the error flags. ECC errors are
logged with the offset of the data. Single ECC errors cause a warning
to be logged and double ECC errors return -EIO.
Fixes#33140.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
Now that we have specific bindings for STM32F100 devices,
we need dedicated treatment for PLL source HSI case.
Otherwise, we end up using undefined symbol STM32_PLL_PREDIV1.
Please note that previous code compiled, it was assigning
a wrong value to prediv. This had no consequence because
prediv value is forced in Cube LL functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
According to RM0041.pdf clock tree for stm32f100xx devices is
different from both STM32F10X density and connectivity lines devices,
but is a combination of both.
Rework symbols definitions so that STM32F100xx is neither of those
and uses:
- CLOCK_STM32_PLL_MULTIPLIER as on SOC_STM32F10X_DENSITY_DEVICE
- CLOCK_STM32_PLL_PREDIV1 as on SOC_STM32F10X_CONNECTIVITY_LINE_...
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Two minor tweaks and a semantics change:
- fix a whitespace nit
- use gpio_pin_configure_dt()
- turn the LED on in case the percentage is nonzero
The last change patterns this driver after behavior in the Android
lights HAL, which recommends analogous behavior when the user requests
a color change in a non-RGB LED:
Do your best here. [...] If you can only do on or off, 0 is off,
anything else is on.
https://source.android.com/reference/hal/structlight__state__t
I think this behavior makes more sense.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Use the CODE_DATA_RELOCATION_SRAM config to indentify code relocated
to SRAM so we can setup the MPU for the SRAM region used for code
relocation.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The AUDIO_DMIC INIT_PRIORITY definition is set to 60 by default,
but this value is causing dmic drivers to be initialized prior to
i2s, to which they are dependent from.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We need to clear interrupt status, before we enable the interrupt.
So I let ite_intc_isr_clear() to be global function.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
The i2s_config structure passed to the i2s_configure() function is
not supposed to be modified by the driver. Similarly, the structure
returned by the i2s_config_get() function is not supposed to be
modified outside the driver.
Decorate the pointers to those structures with the const qualifier
and correct one driver that actually modified the structure passed
to i2s_configure().
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Introduce a new enumeration value that allows setting configuration
and triggering commands for both I2S streams simultaneously.
Such possibility is especially important on hardware where the streams
can be only enabled/disabled (but not started/stopped) independently,
like it is in nRF SoCs.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Automatic collision detection for half-duplex mode can be enabled
by setting `collision-detection` proprety for uart hardware
in the dts file. If the transmitted bit does not match the received
bit an error is raised. This is useful in RS-485 half-duplex mode.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Currently cavs_idc_smp_init() is called from a system
initialisation sequence, which only runs on the main CPU.
However, it must also run on secondary CPUs if those are
powered on later instead of simultaneously with the main
CPU.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
irq_enable() should be called with the composite IRQ code as its
argument, not just the Xtensa proper part of it.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
