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drivers/clock_control: stm32f1: Deal with stm32f100xx devices

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According to RM0041.pdf clock tree for stm32f100xx devices is
different from both STM32F10X density and connectivity lines devices,
but is a combination of both.

Rework symbols definitions so that STM32F100xx is neither of those
and uses:
- CLOCK_STM32_PLL_MULTIPLIER as on SOC_STM32F10X_DENSITY_DEVICE
- CLOCK_STM32_PLL_PREDIV1 as on SOC_STM32F10X_CONNECTIVITY_LINE_...

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-05-03 21:19:40 +02:00 • committed by Kumar Gala
commit 785ecf0991
2 changed files with 3 additions and 4 deletions
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4
drivers/clock_control/Kconfig.stm32f1
View file

@ -15,7 +15,7 @@ config CLOCK_STM32_PLL_MULTIPLIER
int "PLL multiplier"
depends on CLOCK_STM32_SYSCLK_SRC_PLL
default 9
range 2 16 if SOC_STM32F10X_DENSITY_DEVICE
range 2 16 if !SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE
range 4 9 if SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE
help
PLL multiplier, PLL output must not exceed 72MHz. Allowed values:
@ -24,7 +24,7 @@ config CLOCK_STM32_PLL_MULTIPLIER
config CLOCK_STM32_PLL_PREDIV1
int "PREDIV1 Prescaler"
depends on SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE && CLOCK_STM32_SYSCLK_SRC_PLL
depends on !SOC_STM32F10X_DENSITY_DEVICE && CLOCK_STM32_SYSCLK_SRC_PLL
default 1
range 1 16
help

3
soc/arm/st_stm32/stm32f1/Kconfig.soc
View file

@ -10,11 +10,9 @@ choice
config SOC_STM32F100XB
bool "STM32F100XB"
select SOC_STM32F10X_DENSITY_DEVICE
config SOC_STM32F100XE
bool "STM32F100XE"
select SOC_STM32F10X_DENSITY_DEVICE
config SOC_STM32F103XE
bool "STM32F103XE"
@ -41,6 +39,7 @@ endchoice
config SOC_STM32F10X_DENSITY_DEVICE
bool
help
STM32F101xx, STM32F102xx, STM32F103xx:
* Low density Value line devices
* Medium density Value line devices
* High density Value line devices