The irq will be enabled at the condition of start or repeat
start of I2C. If timeout occurs without being wake up during
suspend(ex: interrupt is not fired), the irq should be
disabled immediately.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add support for power management and the shutdown mode for bq274xx fuel
gauge sensor. This now allows boards that have any kind of low power
mode to turn on or off the sensor.
Tested on a Company's custom board with bq27421 sensor on it.
Signed-off-by: Luka Lopotar <luka.lopotar@greyp.com>
The flag source_periph seems to be incorrectly set in dma_stm32.
In case the transfer direction is from periph to mem, then the
stream->source_periph is 1 (true) else it is false.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
All the macro for dma-cells are now in the
include/drivers/dma/dma_stm32.h header file.
So the include/dt-bindings/dma/stm32_dma.h is no more
useful and removed from #include.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The macro to set the element of the dma-cells for each peripheral
are defined in the dma_stm32 header file
and used in the periph driver (as dma client)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This is the dma V2bis which is particular DMA V2 instance for
stm32F1 and STM32L1 soc series. This DMA does not use the dma slot
Otherwise it is similar to version V2.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Implement a clock control driver for Microchip MEC172x handling
configuring the 32 KHz input sources for the PLL and peripheral-32k
clock domains. MEC172x differs from MEC152x. MEC152x had one 32K source
for both PLL and peripherals. MEC172x allows the two domains to use
independent 32 KHz sources. Device tree updated to provide addresses
of hardware used by the driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
the macro STM32_LSE_CLOCK is always defined and therefore systems
without lse crystals hang on startup.
Used #if instead of #ifdef.
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
Because these two functions are called from threads and ISR.
And they run a bit-wise OR operation on the interrupt registers.
So protect them to prevent race condition between thread and ISR
context where causing an interrupt won't enable as expected.
eg.
- Pseudo code of thread enable IER1's bit1:
1. load word from IER1 (0x40) and write into CPU register S1
=> S1=0x40
2. Or S1's bit1
=> S1=0x42
(But if an interrupt is triggered here)
3. Store word to IER1 from S1
=> IER1=0x42
(IER1 will be 0x42 not 0x43, IER1's bit0 is disable again due to the
race condition above)
-Pseudo code of ISR enable IER1's bit0
1. load word from IER1 (0x40) write into CPU register S2
=> S2=0x40
2. Or S2's bit0
=> S2=0x41
3. Store word to IER1 from S2
=> IER1=0x41
4. Go back to thread.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit adds a driver implementation for the LM75 I2C temperature
sensor.
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
reuse the lpc's lpadc driver for rt1170, modify the dts and add
some macro to shield some code of LPC series. Also add the
board support inside the tests/drivers/adc/adc_api/src/test_adc.c,
and a dts node:zephyr,user inside
samples/drivers/adc/boards/mimxrt1170_evk_cm7.overlay
Signed-off-by: Crist Xu <crist.xu@nxp.com>
This converts register access from macro to functions.
This allows SoCs to override these functions if needed.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the HPET timer to use kconfig to specify clock
frequency instead of relying on calculation at runtime.
When the frequency is known at build, this allow the toolchain
to optimize some calculations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This renames MIN_DELAY to HPET_CMP_MIN_DELAY, and also allows it
to be overridden. The default delay is for HPET with relative
high frequency, and may not suitable for all HPET
implementations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This extracts the hard-coded value into a macro which can be
overridden. This is in preparation for SoCs where the period
is not in femptoseconds.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch states that the Everlight B1414 LED controller is compatible
with the Worldsemi WS2812. Some information about it is added to the
WS2812 DT binding and driver Kconfig files.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Since this driver is working reliably, let's use k_usleep() instead of
k_busy_wait() (as suggested in a TODO comment) to latch and reset the
LED strip controller.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some devices compatibles with the WS2812 IC have a different reset/latch
delay.
This patch introduces the "reset-delay" optional property for the WS2812
DT binding and adds support to the ws2812_spi driver. This new property
allows to configure the reset/latch delay of a WS2812 compatible LED
strip controller from its DT node.
If omitted the driver uses 8 microseconds by default (which is good for
the WS2812 IC).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some devices compatibles with the WS2812 IC have a different channel to
color mappings (e.g. RGB, BGR, RGBW, etc).
This patch introduces the "color-mapping" required property for the
WS2812 DT binding and adds support to the ws2812_gpio and ws2812_spi
drivers. This new property allows to configure the color to channel
mapping of a WS2812 compatible LED strip controller from its DT node.
Since this property also allows to know if a white channel is available,
then this patch removes the "has-white-channel" property.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
When DMA switches from one buffer to another ENDRX followed by
RXSTARTED is generated. Code flow assumes that ENDRX will be
handled before RXSTARTED but this may not be the case if there
is a short between ENDRX and RXSTARTED and event occurs after
ENDRX event check but before RXSTARTED event check. In that case,
RXSTARTED event is handled first. Such case may happen if there
is a higher priority interrupt that may preempt UARTE interrupt
handler.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add a new property to the "nordic,nrf-clock" binding to allow
configuration of the HFCLKAUDIO frequency.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Refactors the mcux lpc driver to use DT_INST_FOREACH_STATUS_OKAY instead
of hardcoding each instance. Tested with samples/basic/button and
samples/basic/blinky on mimxrt685_evk_cm33.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In certain build cases we get the following compiler warning:
i2c_rcar.c: In function 'i2c_rcar_transfer_msg':
i2c_rcar.c:168:6: warning: 'ret' may be used uninitialized in
this function [-Wmaybe-uninitialized]
Fix this by initializing ret to 0 at start of function.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit aligns the nRF5 ieee802154 driver with the latest
API changes necessary to handle security-related flags properly.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
RTC interrupt was reading CC value and passing it to the handler.
However, higher priority interrupt could preempt RTC interrupt
and set new CC value. In that case CC value read in the RTC
interrupt context was not the one that triggered the interrupt.
Added fallback to COUNTER value if that case is detected.
Using COUNTER is not as precise as CC because it returns time
when event was handled and not when event occured but it is the
only option since CC value is overwritten.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The zephyr sam gmac driver don't get register address and, in some
cases, peripheral id from devicetree. This replace headers constants
in favor of devicetree values.
This fix wrong Atmel SAME7x/SAMV7x gmac register address and add
missing peripheral id property for SAM family.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current GMAC compatible not allow especialize properties by SoC
family. Split current generic Atmel GMAC compatible into two new
compatibles which are defined by SoC families. This increase the
freedom and avoid odd situations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
A syscon device is a device managing a memory region containing a set of
registers that are not cohesive enough to represent as any specific type
of device. We need a driver for that because several other drivers could
use the same region at the same time and we need to io-map the region at
boot for MMU enabled platforms.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Assuming gpio devices are required by pinmux which is used
by any device make it a device that is initialized in preliminary
steps of platform init.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move GPIO devices clock handling in stm32_pin_configure function
which is also used in stm32_setup_pins.
Additionally, add device usability check to be sure gpio driver
was initialized before being used by pinmux pseudo driver.
Last, going from the assumption that GPIO devices should be
initialized before being used by pinmux, then there is no need
to enable clock in case CONFIG_PM_DEVICE_RUNTIME=n.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
