Add get_config function to NPCX I2C driver. The master mode is hardcoded
and get the speed from a controller.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Some applications need to get the current I2C configuration. Add a
proper callback to I2C API under Kconfig option not to change
applications that don't need this feature.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This commit is fixing the error on clock control for the AHB3
in the stm32_clock_control_off function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Added watchdog implementation which is using counter device
to implement watchdog driver API. Watchdog timeout is called from
counter interrupt context. Some counter implementations support
using ZLI interrupt level which can be use here as well. Watchdog
like this can be used along hardware watchdog to cover for its
limitations, i.e. Nordic watchdog resets unconditionally after
62uS after triggering watchdog interrupt. It is not enough time
to dump logging data.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Return -EBUSY (not 0) from pwm_pin_enable_capture() if PWM capture is
already in progress.
Fixes: #39817
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The FIU/UMA module in the NPCX chip provides an dedicated SPI interface
to access the SPI flash. This commit adds the driver support for it.
With this commit, the application can call the flash APIs
(via spi_nor.c) to access the internal flash of NPCX EC chips.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I32bbf09f6e014b728ff8e4692e48151ae759e188
Use a more precise Kconfig symbol name to avoid namespace conflicts when
more NRFX-dependent drivers will be added.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Refactors all of the DMA drivers to use a shared driver class
initialization priority configuration, CONFIG_DMA_INIT_PRIORITY, to
allow configuring DMA drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_DEFAULT or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors the remaining display drivers that didn't already use the
shared driver class initialization priority configuration,
CONFIG_DISPLAY_INIT_PRIORITY.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit adds minimal support of Xen hypervisor console via UART-like
driver. Implementation allows to use poll_in/poll_out char interface for
uart_console.c driver directly to HV console instead of using Xen
virtual PL011 UART. Future implementation will support interrupt driven
interface on Xen event channels, currently it is under development.
Also this commit introduces early console_io Xen interface, which allows
to receive printk/stdout messages quickly after start, but requires Xen,
built with CONFIG_DEBUG option.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
The maximum number of concurrent filters depends on the hardware and
the driver implementation. This API allows the application to obtain
the maximum number of available filters.
Signed-off-by: Martin Jäger <martin@libre.solar>
Setting the power mode to enabled causes other initialization to not
occur. Restore the power mode set upon entry when exiting.
Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
Change format in various shell_error calls from int to long unsigned
int.
Warning:
warning: format '%d' expects argument of type 'int', but argument
6 has type 'long unsigned int'
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Fixes interrupt-driven operation. With the previous way of
handling the TX FIFO and the interrupt flags, the operation
of the UART was prone to stalling when using it as the
console I/O device.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Add support for the Xilinx Zynq-7000 SoC family to this driver. This
includes some SoC-specific register accesses when setting an updated
TX clock divider, also, the device tree binding now supports higher
MDC clock divisor values when the current target SoC is a Zynq rather
than a ZynqMP.
With regards to the use of this driver in a QEMU simulation of the
Zynq-7000, the Kconfig file is modified so that the driver is not
enabled unless QEMU networking is set to Ethernet mode.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Modification of the ARM architected timer driver and its configuration
data in order to address an erratum which exists at least in the Cor-
tex-A9 CPU, and which can also be observed in the QEMU implementation
of the Cortex-A9.
Comp.: ARM Cortex-A9 processors Software Developer Errata Notice
ARM document ID032315
Erratum 740657
This erratum causes a spurious interrupt pending indication with the
interrupt controller if no new compare value is written within the
timer ISR before the interrupt is cleared. This is usually the case
in tickless mode. If the spurious interrupt is not prevented, the
timer ISR will be called twice, but on second execution, the pending
flag is not set within the timer's register space. Not handling this
issue will lead to erratic tick announcements to the kernel.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
A single PWM driver can be used for multiple LED numbers. In that
case -EALREADY may be reported. It should be ignored.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Rewrite the NRFX IPC driver to properly support multi-channel addressing
leveraging the newly introduced MBOX APIs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.
If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.
This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This is a driver for the Synopsys DesignWare MAC. It should work
with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x
and 5.x.
This driver uses a zero-copy strategy, meaning that the hardware
reads and writes data directly from/to packet fragment buffers
provided by the network subsystem without first copying the data into
a dedicated DMA bounce buffer.
Platform specific setup is necessary for the hardware to work.
Currently, only the STM32H7X series is implemented and tested.
While this part needs refinement, this driver performs better and uses
far less code space than the HAL-based alternative.
Not yet implemented:
- MDIO (it is WIP, currently relying on default PHY config)
- PTP support
- VLAN support
- various hardware offloads (when available)
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Refactors all of the DAC drivers to use a shared driver class
initialization priority configuration, CONFIG_DAC_INIT_PRIORITY, to
allow configuring DAC drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are dacx0508, dacx3608, and mcp4725 drivers which have
dependencies on SPI or I2C drivers and must therefore initialize later
than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Adds functionality to receive LoRa packets asynchronously. Reception
runs continuously until cancelled by another call to `lora_recv_async`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add RSSI member into gsm_ppp_modem_info structure in order to
get that information using the gsm_ppp_modem_info function.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Make modem_info structure public in order to allow the user
to get modem information using gsm_ppp_modem_info function.
Move modem info query commands into separate function
that's called only once during gsm configuring because
there is no necessity to re-querying modem since
they should not change.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
After recent changes in the driver, the predefined `data` pointer in
`uarte_nrfx_pm_control()` would not be used in CONFIG_UART_ASYNC_API
configuration. Fix this by replacing `get_dev_data()` calls with
predefined data pointer where applicable.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
On the stm32H7 family, there are ADC which have Oversampling ratio
of 10 bits OSVR[9:0] in the CFGR2 register. It means that oversampling
512x or 1024x are possible.
Other values are not allowed as the oversampling field of the struct
adc_sequence (adc.h) is 2^oversampling.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The adc_stm32_oversampling function is used to configure
the ratio and shift for each sequence->oversampling
depending on the soc serie and ADC instance in the serie
In the stm32H7 serie, only ADC3 of ADC_VER_V5_V90 version
have a LL_ADC_OVS_RATIO_x contant (other a 9bit value).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change the access to the PCSEL register by using the LL function
because on the STM32H7xx soc, some devices have no PCEL register
especially on ADC3 of the stm32H723.
The LL function manages this difference.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support for dynamic pin control, that is, allow to change device pin
configuration at runtime. Because no device de-initialization is
available yet, this API has limited usage options, e.g. modify pin
configuration at early boot stage (before device driver is initialized)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
