Pin state after SPI deinitialization is based on pinctrl configuration.
On the other hand, CPOL is set during runtime. When the SPI instance
is disabled GPIO takes control over SCK and drives it to state set
by pinctrl driver. This might causes an invalid SCK state
when the transaction is configured with CPOL (Clock Polarity).
To address this issue, a patch was introduced to the SPI driver.
Now, when a SPI instance is configured with CPOL,
the driver is setting in the runtime the correct state of the SCK pin.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Pin state after SPIM deinitialization is based on pinctrl configuration.
On the other hand, CPOL is set during runtime. With the introduction
of the power-optimized SPIM driver, it disables the peripheral instance
once the transfer is completed.
As a result, the GPIO takes control over the SCK pin and drives it
based on pinctrl configuration which causes an invalid SCK state
when the transaction is configured with CPOL (Clock Polarity).
To address this issue, a patch was introduced to the SPIM driver.
Now, when a SPIM instance is configured with CPOL,
the driver is setting in the runtime the correct state of the SCK pin.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
This fixes 3 issues that came within PR #59124 for ppp uart usage.
Earlier start/stop of ppp was done at enable() but that
was removed in PR #59124. Now putting enable/disable() back and
putting start/stop there.
Additionally, there was a double ppp carrier ON when NET_EVENT_IF_DOWN.
For that net_if_carrier_on/off is set in uart ppp.c driver.
Also, maybe worth to be mentioned that after PR #59124 there is no
ppp carrier off when lcp is disconnected, for workaround that change,
application should use ppp dead/running events.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
This commit adds input clock selection to the RTC driver. This
is required to allow for the real hardware to operate. The
QEMU emulated hardware ignores the input clock settings.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
The MC146818 driver was not properly initialized
by the driver, interrupts where not handled correctly,
and the alarm feature was not implemented properly.
This commit fixes these issues, while removing some
code which became redundant as the MC146818 driver
was patched.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
when ap mode is enable,
we don't enable iface by `net_eth_carrier_on` before,
this will cause wifi tx error.
this patch fix this issues.
Signed-off-by: YuLong Yao <feilongphone@gmail.com>
When channel set to WIFI_CHANNEL_ANY, ap will not work.
This patch choose channel 0 when channel is WIFI_CHANNEL_ANY.
Signed-off-by: YuLong Yao <feilongphone@gmail.com>
The default decoder would take the micro-unit value of the old sensor
value and multiply it by INT32_MAX. This would, at times, cause an
overflow for the int64_t which is the cause of some bugs like when
-7952 was used (-7952000000 * INT32_MAX < INT64_MIN). Instead the new
math converts:
- `value_u * INT32_MAX / ((1 << header->shift) * 1000000)`
to a bitmap:
- `sample.val1` consumes the upper `N` bits
- `sample.val2 * BIT(32 - N) / 1000000` consumes the lower `32-N`
bits
This both improves the accuracy, and avoids the overflow since
`shift` is guaranteed to be between 0 and 31.
Signed-off-by: Yuval Peress <peress@google.com>
Implement the backend emul API for the ICM42688 motion sensor so it can
be automatically tested by the generic sensor test (see #60394).
Supports all channels (temp, accel XYZ, and gyro XYZ) at each of the
programmable full-scale accel and gyro ranges.
Also fixes an arithmetic bug in the driver that was causing a minor
error in the returned readings.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Add support for fetching individual channels rather than forcing the
application to always fetch them all. Potentially saves few i2c
transactions.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert a few floating point operation to fixed point. May save some
stack and some flash as well on soft-fp systems.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The register space for the device is on 8 bit, use uint8_t for register
address to the low level read and write functions.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
SiLabs' sleeptimer driver supports several hardware peripherals, of
which the counter driver so far only supports the RTCC-based variant.
This patch adds support for the SYSRTC-based sleeptimer implementation,
which is required for Gecko SoCs that do not have an RTCC module.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
sensor_value_from_double was used, but sensor_value_from_float
should be used as the parameter is a float
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When compiling the cadence uart, a warning is generated for the
zephyr/zephyr.h include. Fix it to be zephyr/kernel.h.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The docstring for uart_cmsdk_apb_irq_rx_ready says "@return 1 if an
interrupt is ready, 0 otherwise" but the function actually returns 2 on
success. This commit fixes this to conform with serial driver API.
Signed-off-by: Jason Mitchell <jmitchell@radicalsemiconductor.com>
Removed single offset alignment check mechanism and replaced it with
offset alignment check for each iteration
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
The LIS3MDL driver misunderstands the MD[1:0] bits in CTRL_REG3.
Correct this so that all ODR settings are functional.
Currently, single-conversion mode is enabled when fast ODR is set,
resulting in only one measurement being taken before the device
immediately returns to power-down mode. The result is that all fast-ODR
rates (155 and higher) are not usable when assigned to CONFIG_LIS3MDL_ODR.
Continuous mode is the only mode truly supported by this driver and should
always be used.
Signed-off-by: Aedan Cullen <aedan@aedancullen.com>
Change the gpio-keys and zephyr,gpio-keys so that they can both be used
with the input subsystem driver. Make the zephyr,code property optional
so that existing out of tree board can still use this node with their
custom code, but change everything else so that an existin gpio-keys
node can be used with the input driver as long as the codes are defined.
From the application perspective, this means that the application can
still use the GPIOs directly, the input specific driver only gets
enabled if CONFIG_INPUT is enabled and the driver can always be turned
off manually.
This makes gpio-keys behave the same as gpio-leds with CONFIG_LED.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Since the sensor shell command was converted to use qt31_t, all the
integer values started to show up as rounded up by a fractional unit
when displayed, due to the conversion always rounding down.
Fix that by using the recently introduced DIV_ROUND_CLOSEST and handling
rounding up to next integer explicitly.
Before:
channel idx=44 gauge_state_of_charge value=83.999999
after:
channel idx=44 gauge_state_of_charge value=84.000000
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
After boot the channel used for loading the basefw might be left enabled
by ROM.
Make sure that all channels are in stopped state to have consistency.
On TGL during Zephyr boot one channel is left running:
0:0x0x72800: Channel 0 of host out DMA (used for bassefw loading)
dgcs: 0x4800100,
dgbba 0x6000,
dgbs 32768,
dgbrp 8192,
dgbwp 8192,
dgbsp 0,
dgmbs 0,
dgbllpi 0x0,
dglpibi 0x0
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
The controller and the driver support two hardware configurations:
- one three-channel (RGB) LED
- or three single-channel LEDs
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
Instead of implementing a custom power off API (pm_system_off),
implement the sys_poweroff hook, and indicate power off is supported by
selecting HAS_POWEROFF. Note that according to the PSCI specification
(DEN0022E), the SYSTEM_OFF operation does not return, however, an error
is printed and system is halted in case this occurs.
Note that the pm_system_off has also been deleted, from now on, systems
supporting PSCI should enable CONFIG_POWEROFF and call the standard
sys_poweroff() API.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
So far the init priories were:
enetc_psi0=60 < enetc_vsin=61 < emdio=70 < ethernet-phy=80
because the Ethernet PSI driver was doing global initialization for the
whole NETC complex, including enabling MDIO function (due to the way
the HAL works).
Change to use the default init priorities:
mdio=60 < phy=70 < eth=enetc_psi0=80 < enetc_vsin=81
by executing at an early stage the NETC global initialization. This also
allows to match the DT hierarchy representation of NETC with the
effective priorities assigned.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The led identifer should refer to devicetree ordering, not to the index
used by the controller. This way, it will be possible to deactivate
some leds or to reorganize the indexing if necessary.
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
Some boards may have connected the enable pin of the chipset to a GPIO.
On these boards, it is necessary to configure and set this GPIO before
using the chipset, otherwise the I2C circuitry is disabled.
Based on initial work from:
- Marek Janus <marek.janus@grinn-global.com>
- Rico Ganahl <rico.ganahl@bytesatwork.ch>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
The LP50XX family has a specific register to reset the configuration to
default state from any other state. Use this instead of relying on the
manual configuration of registers during startup.
Based on initial work from: Marek Janus <marek.janus@grinn-global.com>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
Add support for LP5009, LP5012, LP5018 and LP5024 devices which only
differ by the number of LEDs they can control.
Also, update application sample to run on all these new supported
devices.
Based on initial work from:
- Marek Janus <marek.janus@grinn-global.com>
- Rico Ganahl <rico.ganahl@bytesatwork.ch>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
This commit addst support for the system timer peripheral which
can be found in Apollo4 SoCs.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
UART controller present in Ambiq SoCs is mostly compatible with PL011, but
requires some quirks that are implemented in this commit:
- the peripheral needs to be powered on first, via the PWRCTRL core,
- peripheral clock needs to be enabled and configured via the CLKEN/CLKSEL.
registers.
The quirks mechanism was inspired by support for STM32F4 SoC in the
usb_dc_dw driver (fce0b85eca).
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Add definitions for CLKEN/CLKSEL registers, which are used to control
peripheral clock on the variant of the PL011 UART present in Ambiq SoCs.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
The registers definitions will be needed when adding vendor-specific quirks
to this driver, so this commits moves them to a dedicated header file.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
This commit addst pinctrl support for Apollo4 SoCs.
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
The spi_nor erase op selection was based on the alignment of the end of
the region to be erased. This prevented larger erase operations being
selected in many cases
Closes#60904
Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
