Add option to use (by defining the `wake-gpios` devicetree properties)
an additional signal line between SPI master and SPI slave that allows
the latter to stay in low-power state and wake up only when a transfer
is to occur.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Refactor the function to make the execution flow in transceive()
clearer. In particular, return error codes directly, not through
spi_context_complete() which is unnecessary in this case.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The driver would return the temperature for all channels requested
except relative humidity. Instead, ENOTSUP should be returned for
unsupported channels.
Signed-off-by: Josep Puigdemont <josep.puigdemont@gmail.com>
Introduce support for NXP FS26 SBC watchdog. Both Challenger and
Simple watchdog types are supported. Only watchdog functionalities of
the device are supported and any other monitoring feature is either not
supported or disabled.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Do not select CONFIG_CACHE_MANAGEMENT in the Microchip SAM CAN driver
Kconfig but rather leave it up to the SoC/platform Kconfig to enable it as
needed and enable CACHE_MANAGEMENT by default for the Atmel SAM E70/V71 SoC
series.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
It's used to pass right device index to hal_intel module.
DT_INST_FOREACH_STATUS_OKAY() does not guarantee the node ordering.
Signed-off-by: Dong D Wang <dong.d.wang@intel.com>
Currently on zephyr, RAIL is used only for bluetooth. RAIL library is
needed to use efr32 radio regardless of the protocol used. We add
SOC_GECKO_USE_RAIL kconfig option to indicate if we use radio.
FPU is needed when using RAIL, we configure it if SOC_GECKO_USE_RAIL
is set.
Signed-off-by: Antoine Bout <antoine.bout@silabs.com>
Fix an unused variable build warning that was happening in certain
configurations. Move the variables in the only condition where they are
actually used.
west build -p -b nucleo_f429zi \
-T samples/net/cloud/aws_iot_mqtt/sample.net.cloud.aws_iot_mqtt
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Calculate the Bosch M_CAN Message RAM addresses relative to the Message RAM
Base Address (MRBA), not the offset.
Fixes: #59624
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Rename the phy-dev property with phy-handle to match the Linux
ethernet-controller binding and move it up to ethernet.yaml so that it
can be used by other drivers.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Adds a new serial shim driver for Intel SoCs. Builds upon the SEDI bare
metal UART driver in the hal-intel module.
Signed-off-by: Nachiketa Kumar <nachiketa.kumar@intel.com>
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
This PR introduces a backend API to be implemented by sensor emulators
that creates a standardized mechanism for setting expected sensor
readings in tests. This unlocks the ability to create a generic sensor
test that can automatically set expected values in supported sensor
emulators and verify them through the existing sensor API. An
implementation of this API is provided for the AKM09918C magnetometer.
A generic sensor test is also created to exercise this implementation.
Observe that this test knows nothing about the AKM09918C; info about
supported channels and sample ranges is discovered through the backend
API. The test iterates over all devices attached to the virtual I2C and
SPI buses in the test binary's device tree, which (theoretically) covers
all sensors. Sensors whose emulator does not exist yet or does not
support the backend API are skipped.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The sensor driver uses the value 500 to convert bit counts to microgauss
values, but it should actually be 1500. Edit the driver unit test to use
the macro instead of a magic number.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
DMA only works with non-cached memory regions in H7. Check them
and return an error if they don't match this condition.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Add support ADC SAR for NXP S32. ADC SAR diver
support 3 group channels (precision, standard
and external), run normal trigger in oneshot
conversion mode with 2 callbacks normal end
of conversion and normal end chain callbacks.
An instance only run on 1 group channel and
1 kind of callback at the same time.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Enable SPI SDHC driver to manage card power via pwr-gpios property.
Control for this property was previously partially implemented. When
this property is present, the SPI SDHC driver will use it to control
power to the SD card.
Power is toggled during SD init, so this power control can make SD init
more reliable as the power toggle will insure the SD card state is reset.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The IEEE 802.15.4 API and networking subsystem were using several
inconsistent timestamp resolutions and types. This change defines all
timestamps with nanosecond resolution and reduces the number of
available types to represent timestamps to two:
* `struct net_ptp_time` for PTP timestamps
* `net_time_t` for all other high resolution timestamps
All timestamps (including PTP timestamps) are now referred to a
"virtual" local network subsystem clock source based on the well-defined
types above. It is the responsibility of network subsystem L2/driver
implementations (notably Ethernet and IEEE 802.15.4 L2 stacks) to ensure
consistency of all timestamps and radio timer values exposed by the
driver API to such a network subsystem uptime reference clock
independent of internal implementation details.
The "virtual" network clock source may be implemented based on arbitrary
hardware peripherals (e.g. a coarse low power RTC counter during sleep
time plus a high resolution/high precision radio timer while receiving
or sending). Such implementation details must be hidden from API
clients, as if the driver used a single high resolution clock source
instead.
For IEEE 802.15.4, whenever timestamps refer to packet send or receive
times, they are measured when the end of the IEEE 802.15.4 SFD (message
timestamp point) is present at the local antenna (reference plane).
Due to its limited range of ~290 years, net_time_t timestamps (and
therefore net_pkt timestamps and times) must not be used to represent
absolute points in time referred to an external epoch independent of
system uptime (e.g. UTC, TAI, PTP, NTP, ...).
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Adapts a return type to the API specification. The changed return type
is not referenced anywhere so it can be changed without breaking
backwards compatibility.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Add driver for HX8394 TFT LCD controller. This controller is driven via
MIPI DSI, and is configured for a 720x1280 display
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Most implementations have the same logic, with only a different write
block size. Now that we are using write-block-size from the device tree,
it is possible to use a default implementation that can be overridden if
necessary.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
STM32L5 have a write block size of 8, but STM32U5 and STM32H5 have a
write block size of 16. Convert write_dword() and
flash_stm32_write_range() to write write-block-size data at a time.
Fixes#60724
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
STM32L5 have a write block size of 8, but STM32U5 and STM32H5 have a
write block size of 16. Use write-block-size from the device tree
instead of hardcoding this value when validating the range of write
operations.
Fixes#60724
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Update to shim driver compatible with the hardware block
in S32K344. Configure the pins before initializing I2C
to avoid happening bus busy.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Each CAN instance of S32K344 has different maximum number
of message buffers, depends on payload. Add kconfig that
defines maximum number of message buffers for concurrent
active instances and update driver to compatible
support S32k344.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Return ENOTSUP when getting the humidity channel if the driver is used
with a BMP280, since this device does not provide humidity readings.
Signed-off-by: Josep Puigdemont <josep.puigdemont@gmail.com>
LEUART_Typedef isn't defined for every possible target.
It should be included in the conditional compilation part.
For proper handling of UART location, the driver needs
to remember pin configuration of both TX and RX.
This was broken in #60695 is brought back here.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
When testing Wi-Fi with MQTT/HTTP/Socket features,
network stacks can be full very fast, causing network issues
and eventual crash.
By analyzing used stacks,increasing the stack size described
in this PR fixes most use cases related above.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a mutex to protect shared data-structures, since shell can have
multiple backends.
Signed-off-by: Marco Argiolas <marco.argiolas@ftpsolutions.com.au>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 8 (CCU8)
module. There are two CCU8 nodes with each one having four slices.
Each slice has two output channels.
Unlike CCU4, this module can generate complementary high-side/low-side
signals for each output channel. A variable dead time can be added
during the off to on transitions to make sure that the
high-side/low-side signals are not on at the same time.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 4 (CCU4)
module. There are four CCU4 with each one having four channels
Thus it's possible to have up to 16 pwm output signals. The output of
each channel can only be connected to a specific port/pin. The possible
connection and gpio configurations are defined using pinctrl.
The CCU4 module also has a capture mode. Capture support will be added
in the future.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
CC13/26xx's pinctrl_cc13xx_cc26xx.c driver included ioc.h and
(indirectly) pinctrl_soc.h which contained duplicate defines.
This change removes the header conflict and redundant definitions.
This prepares for subsequent changes in this change set that add
additional flags to the pinctrl driver which would otherwise trigger the
header conflict.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Added a driver for the DFRobot A01NYUB distance sensor. This sensor
sends its readings via UART at 9600 baud. This driver uses interrupts
to read the data from the sensor.
Signed-off-by: Oliver King <oliver.king@steadconnect.com>
Startup power domains according to the expected final state given the
power supply and PM device runtime support.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Let the driver compile without `PM_DEVICE_POWER_DOMAIN`, in which case
the driver only controls the GPIO, without notifying dependant devices.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Implement `gpio_pin_get_config` for the stellaris platform, and by
extension `qemu_cortex_m3`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This is a follow-up to commit 4c20403629.
CONTAINER_OF() cannot be used to obtain the device pointer from its
data pointer as this data is not contained in the device structure.
Instead, use a dedicated member in the device data structure to store
the device pointer.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for flash NOR memory devices on a NXP S32 QSPI bus. The
driver uses a fixed LUT configuration assuming a default standard page
size and erase types, and allows to select between multiple read/program
instructions/modes. It is also possible to read the flash device
characteristics from the device at run-time as long as the memory is
JESD216 compatible, providing more flexibility.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The NXP S32 QSPI controller acts as an interface to up to two serial
flash memory devices, each with up to eight bidirectional data lines,
depending on the platform. It is based on a LUT enginee to interface
through commands with different memory types including flash NOR and
Hyperram.
This patch adds support for the QSPI in S32K344 which supports a single
memory device (side A) with up to four bidirectional data lines and SDR
only. Nevertheless, the memory controller is implemented flexible enough
to be extended to support more feature-rich QSPI blocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
