Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib7e0b81b2df1a0225fc244fea3035416d0a4f282
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The SPI API states:
"max_sys_freq is the maximum frequency supported by the slave it
will deal with"
However, currently, for DW the max_sys_freq is a divider which confuses
the user.
This patch adds a small hack to allow users to use both dividers and
frequencies when configuring the bus. The only trade-off is one has to
use dividers for bus frequencies smaller than 65536Hz. However, since
most devices nowadays can run at clock frequencies more than 100kHz,
this is a good compromise.
Change-Id: I44386cc8ad501b08eeaf71bc7588661ff36e108b
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@intel.com>
The commands array is not expected to change and can be declared
const. This allows callers to cleanly declare their commands lists as
const, effectively moving the structures from SRAM to code section.
Change-Id: Ie1710622b8cfa609e129eb79712f910f1d1aace3
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
The comments in the sensor header specify that pressure should be
expressed in kPa, but the bmp280 driver returns a value in Pa.
Change-Id: I6d5346db250d1a01a1e5e31fb1d8685ab5dc405b
Signed-off-by: Vlad Dogaru <vlad.dogaru@intel.com>
Fixes this built error:
zephyr/drivers/pinmux/dev/pinmux_dev_quark_mcu.c:138:18:
error: 'PINMUX_BASE_ADDR' undeclared here (not in a function)
.base_address = PINMUX_BASE_ADDR,
Change-Id: I54f15bc262cb887117f7b56660bcf85983daa877
Signed-off-by: liu.lei <lei.a.liu@intel.com>
Implement bt_gatt_attr_read_cud() making working peripheral_esp app.
Change-Id: Ic9634bf31a39ae9cd55279de34ee4c0c0995a4dd
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
When an ethernet frame is larger than UIP_BUFSIZE,
a net_buf is allocated but never released. Therefore
after few bad frames, no more RX network packet
can be received.
Fixed by allocating the net_buf after checking
the frame length.
Change-Id: I436487e3c26d739de347b4db6facc3a3dbebbe75
Signed-off-by: Sebastien Griffoul <sebastien.griffoul@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
This also separates IRQ_PRI into one for DW and one
for QMSI, to follow the convention of every other
drivers.
Change-Id: I338f819f71c18fa9e17015e8a588a3d0207350c6
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ic73783189db57059d2b7f3727e4802e1b2e27931
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ifd65097a65f80539cac073f95aadc2d8e42efb9f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ifdbb5e3a997795ef577350d88f8cb06877eb6463
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch extends the i2c shim driver so it supports the 'default
configuration' infrastructure which enables the user to specify a
default configuration for the I2C device. The default configuration
is set during driver initialization.
This patch also changes Quark SE and D2000 Kconfig.defconfig files so
the i2c default configuration is set to '0x12' which means standard
bus speed, 7-bit addressing and master mode. This is the same value
used when DW driver is selected, by the way.
Change-Id: I06e0dc3c29e8da2f3317db5bef285177f2e92c9a
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Remove those kconfig options that are SoC specific, and should not be
configurable via kconfig.
Change-Id: Ia62888838877da4627419bd36c261d5254761acd
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Each option within Kconfig.qmsi already set its dependency so this
patch removes the 'if I2C_QMSI' block since it is redundant.
Change-Id: Ic221b96766ecac685491cb31525caf28e641ee45
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Current interrupt status tells which pins triggered this interrupt, thus
the handler should acknowledge only these and not all possible, since we
don't know if other gpio controller interrupts are being taken care of
at the same moment.
Change-Id: I7d3f1bb13bb293f7b7ce9b5a717a37bbdd4e4e42
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
This is hardware design so there is no need for it to be
configurable in kconfig.
Change-Id: Iff162f330aae8ef9a7139b6e7ed9bfa87f26189a
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The IRQ triggering condition should be specified by SoC as it is
a decision for hardware design. This should not be configurable
in kconfig.
The default is to be triggered on rising edge, just as the same
old kconfig did.
Change-Id: If59d88a30711eb8e03d9cc4f409055cefe1995c5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.
Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch fixes drain of data left in UART Rx fifo.
uart_irq_tx_ready checks if Rx IRQ has been raised,
but because Rx IRQ is disabled this won't work even
if there are some data left in the UART buffers.
So simply uart_fifo_read is used to discard the data that
left in UART buffer.
Change-Id: I17f145ba58640650bafd3602412fc75229f39664
Signed-off-by: Mariusz Skamra <mariusz.skamra@tieto.com>
The PWM_QMSI_DEV_NAME and PWM_QMSI_NUM_PORTS options depend on PWM_QMSI
already so this patch removes the 'if PWM_QMSI' block since it is
redundant.
Change-Id: Iec303d27f088b96662fc58933eaa82fe9459cb59
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Fixes this built error:
zephyr/drivers/pinmux/quark_mcu/pinmux_board_quark_se_dev.c:149:19:
error: 'PINMUX_BASE_ADDR' undeclared (first use in this function)
_pinmux_defaults(PINMUX_BASE_ADDR);
Change-Id: I8302e4d6dbcf961e0c80f6bccf740a877bb364af
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The base addresses are SoC specific so there is no need to make
configurable via kconfig.
Change-Id: Iaf8444f77513255d5f0112af6710243aae09f066
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is to standardize the kconfig for specifying IRQ priority.
Change-Id: Iab10655c6fc6f17c0c6dd49cb7a4e74fabcf852c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is to standardize the kconfig for specifying IRQ priority.
Change-Id: I3a51b35e633dc7b1b841e9fa504bf0cfc0d4d575
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is to standardize the kconfig for specifying IRQ priority.
Change-Id: I05ae4033e2c5431ba2727c5d4000ef07e14739c8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.
Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is to follow how kconfig are defined for other SoC/boards.
Origin: refactored from exising file
Change-Id: Ic83b8a336f1910f17b3cf4e7f029fd076ba1b6bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base address, IRQ line, chip select numbers, and clock
gating constants are static per SoC, so there is no need to
make them configurable in Kconfig.
Change-Id: I9f87ca29c28c38c42d4e4f1a3a41fa231f63ef03
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.
Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.
Change-Id: Ia252958d205e0100d1b92e2a12d4c22411bc94b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.
Change-Id: I79b142414143bc5ef585d3136a00375233de1723
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is a temperature and atmospheric pressure chip. The datasheet is
available at:
https://www.adafruit.com/datasheets/BST-BMP280-DS001-11.pdf
Change-Id: I3406eb6c2c4da564757b8315323d0681d648b541
Signed-off-by: Vlad Dogaru <vlad.dogaru@intel.com>
Added device power management hook infrastructure. Added
DEVICE_INIT_PM and SYS_INIT_PM macros that creates device
structures with the supplied device_ops structure containing
the hooks.
Added example support in gpio_dw driver. Updated the sample
app and tested using LPS and Device Suspend Only policies.
Change-Id: I2fe347f8d8fd1041d8318e02738990deb8c5d68e
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.
Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add support for task_sleep() and fiber_sleep() during the
system initialization. When CONFIG_NANO_TIMEOUTS defined,
before the k_server() starts, kernel uses nanokernel
system clock announce and task sleep functionality.
To give device drivers early sleep functionality, the system
clock has to start on SECONDARY initialization level, same
as most of the drivers.
Change-Id: Ie1d391945cd1cfb9a5dc199783c2d224eb1b0ef3
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Build with GPIO port E failed due to a missing comma.
Change-Id: Ib8fa7f4d03ed4f4c713a3a8a16ad3b37fcf6b0b7
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
This driver will be used when changing pinmux functionality during
runtime.
Change-Id: I8dc7b36af13202b97183c5ee05932567e7396276
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.
Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver can be used for multiple boards based on the Quark
microcontroller family, the exceptions are Quark X1000 and Quark D1000.
Change-Id: I4c6624293515e4bbf31ac94a7f57905b4a9ef13d
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
