A regression was introduced in ef804d8408
when the M_CAN driver was swapped to use the generic dcache API, but
cache management was not enabled on SAM devices.
Enable cache management on SAM devices when CAN_SAM is selected.
Signed-off-by: Perry Hung <perry@genrad.com>
The SAF XEC driver for eSPI was not enabled by default so sample
code for espi was failing. This commit changes the behavior to match
current scheme of enabling the drivers based on the status of required
device tree nodes.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The ADS1x13 does not have a PGA, and will have a fixed
internal reference voltage of 2048mV. This sets the internal
referece voltage for the ads1x1x to 2048 and adjust the gain
configuration to scale.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
Call lis2dw12_data_ready_mode_set() API in order to properly
set CLTR7.drdy_pulsed bit.
(Fix#51488)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The USB device subsystem driver's set_interface() function calls
usb_dc_ep_configure() followed by usb_dc_ep_enable(). When
switching between alternate settings of a configuration's
interface, set_endpoint() can be followed by reset_endpoint() on
an endpoint. Some time later, set_endpoint() can be called again
on the same endpoint. This results in the HAL's
kUSB_DeviceControlEndpointInit function being called twice in a
row, which causes a memory allocation error. A simple solution is
to call the HAL's kUSB_DeviceControlEndpointDeinit function
before calling kUSB_DeviceControlEndpointInit. This overcomes the
memory allocation error.
Signed-off-by: Milind Paranjpe <mparanjpe@yahoo.com>
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.
This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.
Adds the loopback binding option to enable the spi_loopback test.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
By Starting the timer when period was set to 0, the SCTimer was giving
control of the pin back to the timer and over-riding the value written
to base->OUTPUT register. Consequently, the PWM timer was never
stopped and still using the previously configured period.
The PWM now correctly stops when setting the period to 0.
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
Add runtime physical memory discovery. This allows platforms with
different physical memory sizes to use the same driver for memory
management.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
The PLTRST# virtual wire signal's reset signal is eSPI Reset#.
But it8xxx2 didn't enable the feature by default. This change
will enable the feature at default.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Add support input interrupts for GPIO pins on NXP S32Z27
SoC. The driver will convert GPIO pin to respective
interrupt line that will be processed by External
Interrupt Controller.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add initial support for the NXP S32Z27 SIUL2 External
Interrupt Controller. Each SIUL2 node has a child node
will act as an interrupt-controller that processes external
interrupt signals.
This driver is required to manage GPIO interrupts.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
New ADC driver for the TI CC13xx/CC26xx family.
ADC channel configurations are translated from Zephyr constants to
simplelink driverlib ones (e.g., sample times use a lookup table).
Async mode was also implemented & tested.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Adds Atmel SAMC20 and SAMC21 soc. C series is based on Cortex-M0+.
C21 contains CAN interface.
The init routines are same for SAMC20 and SAMC21. They use one
clock OSC48M without configuration.
The code is inspirated from atmel_sam0/samd21.
Signed-off-by: Kamil Serwus <kserwus@gmail.com>
Add the support of the stm32MP1 family for DMA peripheral.
This dma driver is similar to the stm32H7.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
struct dai_intel_dmic never had a "created" member, so this assert seems
to be accidentally left in the code. Remove it to allow building builds
with dmic driver with asserts enabled.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Trigger network dropped based on socket error notifications.
This debounces the network state and only triggers
the network interface to go down if the network
really drops or causes socket problems.
This will ensure upper networking stack layers can
cleanup broken sockets properly.
Debounce DNS resolver refresh.
Only trigger DNS resolver refresh if the DNS address changes.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
For PCI Ethernet driver it makes sense to use lookup(id) instead of
probe(bdf, id). Even when using different Qemu parameters we may get
different BDF for e1000 device.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Since moving to Qemu Q35 machine the drivers with hardcoded BDF stop
working. Correct e1000 BDF.
Fixes#51829
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In order to allow proper softAP mode, wifi
libraries and wpa supplicant requires this kconfig
to be enable.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Functions related to string manipulation that were defined in
`common/log.h` has been moved to the `common/bt_str.h` file and their
implementation in `common/bt_str.c`.
Files that were using those functions has been updated consequently.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Zephyr implementation is limited to 4 IRQ per GPIO bank when up to 8 is
theoritically possible.
It is now possible to use until 8 IRQ per GPIO bank. This can be
achieved with minimal effort in a device tree overlay:
&gpio0 {
interrupts = <4 2>,<5 2>,<6 2>,<7 2>,<32 2>,<33 2>;
};
&gpio1 {
interrupts = <34 2>,<35 2>;
};
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
The PWM definitions for Atmel SAM SoCs can differ slightly.
This commit adds support for the PWM defines used by SAM4S.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Cache written data to avoid rewriting same flash page multiple times
when writing subsequent flash pages. The cache is used for reads to
account for reading not yet committed (i.e. dirty) page data. Speeding
up reads is not intention of this patch and therefore the read path
does not modify cache state.
Fixes: #30212
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rename the CAN loopback driver receive function to make the code easier to
understand. Add proper check against NULL for RX callback function
pointers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set default of DISK_DRIVER_SDMMC Kconfig based on the devicetree.
This should avoid having to set the kconfig at the board level
in order to use sdmmc.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Update power_domain drivers to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove one reference in prj.conf that is no longer needed.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Brackets were originally used in the sensor info shell command output to
make it obvious when a field is a null string, however they incorrectly
suggest that a field is an array. Remove the brackets and conditionally
print "(null)" instead.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Add support for configuring CAN emulation support in QEMU. For now, the
only supported CAN controller is the single-channel Kvaser PCIcan PCI card.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This seems to have caused CI failures and its unclear why just yet
so revert instead.
This reverts commit cbee9e9fdd8060d0ca4e91037b3f99f631e4b1a5.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
