the watchdog is enabled by the wdt_setup()
coming after the wdt_install_timeout.
Due to PR #44972, the code did not follow that.
This PR fixes the correct other in the sequence.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
RNG clock configuration constraints differ between each series.
Rather than providing complex build time code to verify RNG clock
configuration is correct, take advantage of CECS bit (Clock error
current status) to assess clock configuration.
This check is implemented under a specific ENTROPY_STM32_CLK_CHECK
Kconfig option. This allows user to disable this feature in specific
conditions:
- CED bit disabled in application (in which case CECS status is not valid)
- Clock configuration is deemed as correct by user. Note that RNG number
are always generated, whatever the clock status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
RNG domain source clock is now configured via call to clock_control
driver.
Besides, add static checks to verify domain clock configuration
is correct:
- If HSI48 is used because it is default domain clock config,
it should be enabled
- If no HSI48 is available, a specific domain clock should be set
- In L0 case, PLL could be used as domain clock only at a specific freq.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS to populate device clock information.
This will allow to add clock source information in next commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The interrupt is used to wake up EC from low power mode.
So EC does not defer eSPI bus while transaction is accepted.
Fixes EC host commands slow issue.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit makes the peripheral-id property optional and removes it's
usage from the Gecko SPI driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Update usage of zephyr_code_relocate to follow new API. The old method
of relocating a file was the following directive:
zephyr_code_relocate(file location)
The new API for zephyr_code_relocate uses the following directive:
zephyr_code_relocate(FILES file LOCATION location)
update in tree usage to follow this model. Also, update the NXP HAL SHA,
as NXP's HAL uses this macro as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
There is no need to disable interrupts while just checking if
a channel needs to be processed in the ISR, as that section
does not contain anything that needs to be protected against
overwriting from some other context. In particular, if a given
timeout is changed or even aborted while its event is being
checked, this will be correctly handled in the code that follows
and that checks the expiration time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Values to be set to the comparator need to be specified in RTC cycles,
not ticks, so the initial value used in the tickless mode needs to be
MAX_CYCLES, otherwise when CONFIG_SYS_CLOCK_TICKS_PER_SEC is set to
a value less then the RTC frequency, the initially configured timeout
will be unnecessarily shorter.
On the occassion, remove also the call to counter() when setting the
initial timeout value in non-tickless mode. RTC is cleared a few lines
above, so at this point it will most likely be 0, and even if it was
not, compare_set() would properly handle a target time value that had
already passed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In non-tickless mode, the timeout handler always announced maximum 1
tick to kernel, but in fact it cannot be guaranteed that the handler
execution is not delayed and that the number of elapsed ticks does not
exceed 1. Use the actual number instead.
Switch also to using a 32-bit value for `dticks` to get a bit simpler
generated code (ticks delta is not supposed to be that huge).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align the condition checked in compare_set_no_locks() with what
set_absolute_alarm() actually provides (and slightly correct the
latter function so that it provides what it is supposed to).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing masking against `BIT(chan)` when handling a forced ISR
to avoid unnecessary processing of multiple channels instead of just
the one that actually requires it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove a piece of code that was supposed to bring an extra update
of the anchor value but which in fact was not able to provide it,
because of the target time checking performed in process_channel(),
and which is anyway unnecessary because the timeout span is limited
to MAX_CYCLES in sys_clock_set_timeout(), so the timeout handler is
guaranteed to be executed at least twice per each RTC overflow.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Eliminate waiting for a potential COMPARE event when setting a CC
value close to the previously set one and rely instead on checking
target time when processing channel events in the ISR.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unnecessary decreasing of the number of ticks by 1 (it was then
increased by 1 when it was converted to the number of cycles) and add
a comment that clarifies the way that ticks < 1 are handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This is important for applications which are chain-loaded by a broken
bootloader which doesn't reset the peripheral before handing over control.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Regulator voltage needs to be within allowed range before enabling. It
could happen that regulator default voltage is out of the allowed range,
so the regulator could be enabled at boot time producing a not-allowed
voltage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The existing linear_range API did not allow values or windows outside of
the linear range (returned -EINVAL). With this change values are allowed
outside of the range, being adjusted to the edge values (min/max)
instead. In the case of windows, it is allowed to have partial
intersection. In both cases, the API assigns a valid index (nearest) and
returns -ERANGE. This change is useful because the main client of the
linear range API, regulators, needs such behavior. For example, If an
application specifies a voltage range from 1.0V to 1.5V and the
regulator supports from 1.2V to 2.7V, the regulator can configure a
voltage that satisfies the condition: 1.2V. With the current API, the
input would be refused because 1.0V lies outside of the 1.2V-2.7V range.
Also, for constant ranges, the minimum index is returned.
Tests have been updated/extended accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to clean up clock related code, replace static build time
clock configuration code by a runtime check.
Since I'm not able to guarantee this check will provide a correct
verdict in 100% of the cases (I'm thinking to ULPI or exotic configurations
like F7 OTG-HS), add a config option to disable it if needed.
It also doesn't apply on F1/F3 series. Keep the build time check for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This change doesn't consider STM32F1 series.
There are 5 categories of STM32 regarding USB domain clock:
A] USB domain clocks directly driven by CK48 clocks
B] USB domain clocks which can select either CK48 or an alternative clock
C] USB domain clocks which can select between MSI or PLL
D] USB domain clocks relying statically on a PLL output
E] USB domain clocks which can be set on 2 different PLL ouputs
For case A], there is nothing to be done. Clk48 was already configured
in a previous change (51c7643295b02ba26ddcd0fd915484114db7101c).
For case B] and C] USB domain clocks will need to be configured in
each board.
For case D] and E] relying on existing dts configuration. Though
there is no easy build time chekc that can be done.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS() to access usb device clock information.
This will help accessing domain clock information from dt nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove this code to clean up the driver.
Clock activation is done from device tree configuration in clock_control
driver.
Users are informed by warning about missing configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On stm32wb, M0 core may enable and disable CLK48 when using RNG.
Lock related hsem to prevent M0 to disable CLK48 when it doesn't need it
anymore.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add kscan pins gpio driver for KSI[7:0], KSO[15:0] pins that
they can be configured to gpio mode. These pins registers address,
bit fields and function are different from GPIO group, so I create
a new compatible driver for these pins.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add stub code for SDIO support, capable of verifying card responds to CMD5.
This commit also changes the architecture of the SDIO probe step to make
adding new protocol support more streamlined, and enable compiling out
support for undesired protocols.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Since nPM1100 may be configured statically in some circuits, BUCK node
may note be defined, so neither API ops or init call are used in the
code. Add __unused attribute to account for such case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
While nPM1100 is to be operated in fixed configuration for some
applications, it has some degree of configuration via GPIOs. For
example, mode (auto/PWM) can be configured via MODE pin. VBUS current
can also be adjusted using ISET pin, even though there is no API yet to
limit the PMIC input current.
This patch adds a new regulator class driver for nPM1100 PMIC, so that
it can be used with the standard regulator API when needed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It is recommended that choices in Kconfig have names
so this commit adds missing one for the type of
host commands peripheral.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
