Commit graph

25,525 commits

Author SHA1 Message Date
Christopher Friedt
9d79728c48 drivers: serial: uart_emul: support interrupt-driven receive
Previously, the uart_emul device did not support interrupt-driven
receive, which is an unwritten requirement for hooking up a uart to
the Zephyr console driver.

The console is a fairly high-traffic subsystem, and we should be able
to perform more extensive testing on it, aside from maching twister
output against a regular expression. With this change, we can use
the emulation uart within the body of a ZTest.

Testing Done:
```shell
west build -p auto -b qemu_riscv64 -t run tests/drivers/console_switching
...
*** Booting Zephyr OS build zephyr-v3.4.0-4277-gae0d63471be1 ***
Running TESTSUITE console_switching
===================================================================
START - test_read
read "Hello, uart_emul0!" from uart_emul0
read "Hello, uart_emul1!" from uart_emul1
read "Hello, uart_emul0!" from uart_emul0
read "Hello, uart_emul1!" from uart_emul1
 PASS - test_read in 0.005 seconds
===================================================================
START - test_write
wrote "Hello, uart_emul0!" to uart_emul0
wrote "Hello, uart_emul1!" to uart_emul1
wrote "Hello, uart_emul0!" to uart_emul0
wrote "Hello, uart_emul1!" to uart_emul1
 PASS - test_write in 0.003 seconds
===================================================================
TESTSUITE console_switching succeeded

------ TESTSUITE SUMMARY START ------

SUITE PASS - 100.00% [console_switching]: pass = 2, fail = 0, skip = 0...
 - PASS - [console_switching.test_read] duration = 0.005 seconds
 - PASS - [console_switching.test_write] duration = 0.003 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION SUCCESSFUL
```

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-10-03 14:58:19 -04:00
Henrik Brix Andersen
f91bfae0a7 drivers: can: mcux: flexcan: validate initial timing parameters
Validate the initial timing parameters set via devicetree.

Fixes: #61909

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-10-03 18:16:46 +01:00
Flavio Ceolin
15aa3acaf6 kconfig: Remove MP_NUM_CPUS usage
Zephyr's code base uses MP_MAX_NUM_CPUS to
know how many cores exists in the target. It is
also expected that both symbols MP_MAX_NUM_CPUS
and MP_NUM_CPUS have the same value, so lets
just use MP_MAX_NUM_CPUS and simplify it.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-10-03 17:45:53 +01:00
Aaron Ye
a94422f686 drivers: spi: Fix the Ambiq apollo4p SPI transmission failure.
The instruction length can only be 0~5.
Use am_hal_iom_blocking_transfer and specify clearly the TX/RX direction.
Hold CS to continue to RX expected response after instruction transmission.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2023-10-03 15:24:20 +01:00
Aaron Ye
7cf21d1080 drivers: spi: Fix Ambiq apollo4p SPI reconfiguration.
The configured SPI should not be configured again.
Otherwise it would cause SPI transmission failure.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2023-10-03 15:24:20 +01:00
Aaron Ye
4e7d1b0f74 drivers: spi: Fix Ambiq apollo4p SPI mode configuration.
The commit fixes the SPI mode improper configuration.
Otherwise the MODE_3 and MODE_0 cases would never be entered as expected.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2023-10-03 15:24:20 +01:00
Erwan Gouriou
c5408ab51c drivers: clock_control: stm32: Use hclk freq for flash latency computation
Flash is clocked with HCLK, while CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
reflects SYSCLK. HCLK = SYCLK / AHB prescaler.
When dealing with flash latency, use HCLK instead of SYSCLK.

This changes reverts a abusive change done in an old commit (efd8ee465c)

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-10-03 15:19:12 +01:00
Erwan Gouriou
b99651df24 drivers: clock_control: stm32: Set flash latency before increasing clocks
Latency should be set before HCLK clock increase. Not doing so can result
in broken behavior.
For instance, at startup, MSI is @4MHz on L4 series.
If MSI is required to be configured at 48 MHz for future use a USB clock,
this will be done in set_up_fixed_clock_sources(). If flash latency is
not correctly set at this point fetching flash will fail..

Move flash latency configuration before setting up fixed clocks.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-10-03 15:19:12 +01:00
Bjarki Arge Andreasen
7cac905e57 drivers: modem: modem_cellular: extend CMUX timeout
This commit adds a timeout of 300ms to the generic (gsm_ppp) init
chat script. This delay is required for some modems (discovered on
a Telit ME910G1-WW) to allow it to enter CMUX mode. Without this
delay, the modem simply refuses to respond to any CMUX commands.

Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
2023-10-03 15:13:47 +01:00
Maureen Helm
aab537c8e2 drivers: ethernet: Decouple generic MII PHY and adin2111 driver Kconfigs
Decouples the generic MII PHY driver from the adin2111 driver by making
it depend on an ethernet-phy compatible devicetree node rather than the
adin2111 driver not being enabled. This makes it possible to add the
adin2111 driver to tests/drivers/build_all/ethernet

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2023-10-03 15:10:12 +01:00
Maureen Helm
66a03e6a38 drivers: ethernet: Remove CONFIG_ETH_ADIN2111_INIT_PRIORITY
Simplifies the adin2111 ethernet driver to use the generic driver class
initialization priority instead of a driver-specific priority.

Suggested-by: Georgij Cernysiov <geo.cgv@gmail.com>
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2023-10-03 15:10:12 +01:00
Maureen Helm
e503ec4064 drivers: ethernet: Fix adin2111 multiple compatibles support
The adin2111 ethernet driver supports both adi,adin2111 and adi,adin1110
devicetree compatibles, however it failed to build when both compatibles
existed in the same devicetree. This may be an unusual configuration for
real systems, but was found when extending
tests/drivers/build_all/ethernet to cover both compatibles.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2023-10-03 15:10:12 +01:00
Florian Grandel
7ac34d0957 drivers: ieee802154: cc13xx_cc26xx_subg: fix timing regression
Fixes a timing regression introduced by commit
a12a6ab5b9.

This caused a massively increased package error rate.

Fixes: #63324.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-10-02 15:53:45 -04:00
Henrik Brix Andersen
9bf17f9276 drivers: can: remove unnecessary asserts in timing callbacks
Remove unnecessary calls to __ASSERT_NO_MSG() in CAN controller driver
timing setter callbacks. The CAN API functions can_set_timing and
can_set_timing_data() already provide run-time timing parameter validation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-10-02 16:59:42 +01:00
Sylvio Alves
b7fbec7920 drivers: i2c: esp32: check busy line before transfer
I2C scan might fail as peripheral is still busy completing last
operation. This makes sure transfer call waits for free line.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-10-02 16:57:39 +01:00
Tomasz Moń
113600eb4b drivers: i2s: use new k_mem_slab definition
Commit 2f003e59e4 ("kernel: Re-factor k_mem_slab definition") moved
block_size into from k_mem_slab to k_mem_slab_info without updating i2s
handlers. Use the new member to fix build failures.

Fixes: #63363

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2023-10-02 08:23:48 -04:00
Johann Fischer
9cb777b95e drivers: uhc: rework transfer buffer handling
The current approach is a bit impractical in the upper layer.
This patch removes the two fifos that hold the transfer buffers
and replaces them with a byte array for the setup packet and
a pointer to a data buffer. The data buffer is mandatory for
all types of transfers except control without a data stage.
The waste of eight unused bytes for non-control transfers should
be insignificant, since an additional pointer would be at least
half of it, and then there would be the overhead of handling it.

This patch also clean up the transfer flags, rename owner to callback
as it reflects the upper layer use case, and add an additional member
to hold the pointer to the USB device (peripheral on the bus).

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-10-01 09:26:07 +03:00
Johann Fischer
960e758e6b drivers: uhc: move transfer status to transfer structure
Aling with the changes in UDC done in the commit ad81b3b797
("drivers: udc: move transfer status to buffer info structure")
This allows us to get the result of synchronous transfer and
simplify uhc_submit_event().

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-10-01 09:26:07 +03:00
Andriy Gelman
31bef35897 drivers: can: mcp251xfd: Add driver
This continue PR #31270. The updated changes are:
- Updated to work with latest zephyr
- Inplace reads/writes of registers
- Batch read of RX messages when multiple messages can be read
- FIFO abstraction of RX/TEF queues
- Handle ivmif errors
- Use READ_CRC for register reads
- Use bitmasks instead of bitfield members
- Rename mcp25xxfd to mcp251xfd
- General cleanups

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-10-01 09:20:37 +03:00
Abram Early
33277f9b48 drivers: can: Implement MCP25xxFD driver
Implementation for Microchip MCP2517FD/MCP2518FD SPI based CAN-FD
controller.

Signed-off-by: Abram Early <abram.early@gmail.com>
2023-10-01 09:20:37 +03:00
Andrzej Kuros
d44e96e486 nrf53: pretick with NRF_802154_RADIO_DRIVER
The `SOC_NRF53_RTC_PRETICK` option is now allowed to be used with
`NRF_802154_RADIO_DRIVER`.

Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
2023-09-30 18:48:19 +02:00
Andrzej Kuros
e03d5d4c6d nrf53: RTC pretick allows user channels and require just one CC
The nrf53 pretick can be used with non-zero
`NRF_RTC_TIMER_USER_CHAN_COUNT` Kconfig option.

The nrf53 pretick requires just one RTC1 CC channel.

The nrf53 pretick handles also RTC1 and RTC0 both CCs and OVERFLOW
events by examination of events scheduled on them. The pretick is set
based on number of ticks to the closest event scheduled that can trigger
an interrupt.

Because the operation in `z_arm_on_enter_cpu_idle` hook would
take too much time with interrupts disabled, the
`z_arm_on_enter_cpu_idle_prepare` hook enabled by Kconfig option
`ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK` is used. It performs RTC0 and RTC1
examination, and sets pretick without interrupts being blocked.

The LDREX/STREX are leveraged to detect if exception took place
between start of `z_arm_on_enter_cpu_idle_prepare` and
`z_arm_on_enter_cpu_idle`. If exception has not been taken, the pretick
calculation can be trusted because source data could not changed and
too much time could not pass. Otherwise the sleep attempt is disallowed,
the idle will loop again and try later.

Prompt for `SOC_NRF53_RTC_PRETICK` Kconfig option allows to control
this option by an user and turn the feature off if necessary.

Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
2023-09-30 18:48:19 +02:00
Krzysztof Chruściński
31eaffdf05 nrf53: Add RTC pretick
Add RTC pretick option that triggers HW activity one tick before and
RTC event that leads to the interrupt. Option is active only on nrf53
network core.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2023-09-30 18:48:19 +02:00
Daniel Fladerer
9d1b7086d7 drivers: serial: uart_mcux_iuart: Add parity bit handling
Adding parity bit handling according to uart_mcux.c

Signed-off-by: Daniel Fladerer <d.fladerer@gmx.de>
2023-09-30 18:45:34 +02:00
Peter Mitsis
baea37aeb4 kernel: Re-factor sys_mem_blocks definition
Rearranges the sys_mem_blocks fields so that information that describes
how much of the memory block is used is co-located. This will allow
easier of its statistics into the object core statistics reporting
framework.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2023-09-30 08:04:14 +03:00
Anas Nashif
34e16225eb neural_net: remove unused experimental API
Experimental API is not being used anymore, remove it.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-29 20:48:33 -04:00
Manuel Argüelles
b38dab48c6 counter: nxp_s32_sys_timer: use clock control APIs
Use clock control API to retrieve the counter module's frequency and
update the boards using it to provide the source clocks.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-29 16:29:31 +02:00
Najumon B.A
a14bc241c0 drivers: sdhc: add driver support for emmc host controller
add host controller driver support for emmc version 5.1.
The driver expose zephyr sdhc api interface for emmc host controller.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-09-29 16:29:00 +02:00
Kelly Helmut Lord
12fa534089 drivers: flash: shell: adjusted load command prompt
Adjusted the prompt of the load command to make it more obvious that
the user is being prompted for keyboard input.

Signed-off-by: Kelly Helmut Lord <helmut@helmutlord.com>
2023-09-29 16:28:40 +02:00
Anisetti Avinash Krishna
c45b719442 drivers: misc: timeaware_gpio: Added intel PCH driver
Added intel PCH driver for timeaware GPIO.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-09-29 16:28:09 +02:00
Anisetti Avinash Krishna
667c35a019 qinclude: zephyr: misc: Added timeaware gpio header file
Added timeaware gpio interface.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-09-29 16:28:09 +02:00
Florian Grandel
36402b6d2a net: pkt: time: introduce ns timestamp helper
A little refactoring that simplifies dealing with nanosecond timestamp
values in packets and further decouples calling code from PTP:

Benefits:
- simplifies calling code by removing redundant conversions.
- prepares for removing PTP dependencies from net_pkt.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-09-29 16:27:15 +02:00
Guillaume Gautier
69fb18a19d drivers: adc: stm32: ADC nocache buffers can be in CONFIG_NOCACHE_MEMORY
CONFIG_NOCACHE_MEMORY is a valid way of declaring buffers in
nocache regions. Consider them valid in the STM32 ADC driver
nocache check.
Copied from commit 818aa2d

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-09-29 16:52:33 +03:00
Dat Nguyen Duy
0b0988db2d drivers: pwm_nxp_s32_emios: add support for pwm capture
This introduces pwm capture shim driver for NXP S32 EMIOS,
the driver uses SAIC mode that is supported for all channels,
to capture the counter value on each edge for period/pulse
measurement

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2023-09-29 15:40:04 +02:00
Dat Nguyen Duy
05fd40012f drivers: pwm_nxp_s32_emios: prepare for support pwm capture
This prepares support pwm capture APIs by extended current pwm
shim driver but use a differrence hal component:

- Introduce a Kconfig options that will be set when PWM pulse
  generation API is used, it is also used to select the hal
  component. Guarding current code inside this Kconfig option

- Increase #pwm-cells to 3, flags is supported for PWM capture

- Do not require duty-cycle and polarity be set in dt, PWM
  capture doesn't need it.

- Rename emum value for pwm-mode to keep only key information

- Add preprocessor in case no channel is configured for generate
  PWM output, to avoid warning when build

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2023-09-29 15:40:04 +02:00
Dat Nguyen Duy
e021108ace misc: nxp_s32_emios: enable and declare interrupt handler
This enables and declares interrupt handlers for eMIOS,
the handlers defined and implemented at HAL, the driver
takes the name for each id from interrupt-names devicetree

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2023-09-29 15:40:04 +02:00
Pawel Osypiuk
7bc93a62b8 drivers: bluetooth: rpmsg: implement .close()
Add .close() implementation for the HCI RPMsg driver.

When running on the nRF5340 application core, it will power-cycle the
network core.

Signed-off-by: Pawel Osypiuk <pawelosyp@gmail.com>
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
2023-09-29 13:53:13 +02:00
Bernt Johan Damslora
9eac29d532 drivers: sensor: npm1300_charger: Correct temperature order of magnitude
Changes the interpreted unit of the threshold temperatures to match the
description (millidegrees).

Signed-off-by: Bernt Johan Damslora <Bernt.Damslora@nordicsemi.no>
2023-09-29 11:57:23 +02:00
Guillaume Gautier
85fa6746de drivers: clock_control: stm32u5: enable backup access before enabling lsi
LSI needs write access to backup domain to be enabled.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-09-29 10:33:42 +02:00
Wouter Horré
3bc531e9c6 drivers: i2c: stm32: Support wakeup from STOP
This commit adds support for wakeup from STOP mode when the i2c device is
configured as a target.

Signed-off-by: Wouter Horré <wouter@versasense.com>
2023-09-29 09:48:04 +02:00
Stefan Petersen
58ca047fa7 dts: stm32h7: flash-controller: Add default STM32 as compatible
Add "st,stm32-flash-controller" as compatible for STM32H7 so that
what is defined for STM32 in general  is also defined for STM32H7.
Already most of the other STM32 versions have this addition.

Also removed the specific STM32H7 flag check in
/flash/driver/Kconfig.stm32.

Signed-off-by: Stefan Petersen <spe@ciellt.se>
2023-09-29 09:47:46 +02:00
Maureen Helm
d5287578fe dts: bindings: boards: Update Ethernet PHY to use reg property
Updates Ethernet PHY devicetree bindings to be more consistent with
Linux by using the standard `reg` property for the PHY address instead
of a custom `address` property. As a result, MDIO controller bindings
now require standard `#address-cells` and `#size-cells` properties.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2023-09-29 09:47:15 +02:00
Maureen Helm
ce42ffcce0 dts: boards: Use ethernet-phy devicetree node name consistently
Some Ethernet PHYs used the devicetree node name `phy`, while others
used `ethernet-phy`. Be consistent and use `ethernet-phy` throughout.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2023-09-29 09:47:15 +02:00
Guillaume Gautier
e8e5d5554c drivers: adc: stm32: reset acquisition time between reads
For all STM32 ADC that use common sampling times, there is a check made to
ensure that all channels of a sequence use the same sampling time.
The value was not reset between reads, resulting in error if two
consecutive sequences used different values.
This commit adds a reset of this value once read is done.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-09-29 09:47:07 +02:00
Yong Cong Sin
8cd64fd791 drivers: gpio: sifive: use Kconfig to convert between levels
The number of IRQ first level bits is not necessarily 8 bits
now, so use `CONFIG_1ST_LEVEL_INTERRUPT_BITS` instead of
hardcoded value.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-09-29 09:46:24 +02:00
Bjarki Arge Andreasen
cc219c0132 drivers: serial: serial_test.c: Patch 64-bit incompat
The serial_test.c driver uses size_t to store read_size,
which becomes a 64-bit type when built for 64-bit
architectures. This is incompatible with the print
format %d which is 32-bit. Updated to %zd

Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
2023-09-28 16:38:30 -04:00
Bjarki Arge Andreasen
d118d19293 drivers: serial: serial_test: Move ring buf dep to Kconfig
This commit moves the dependency management between the
RING_BUFFER and UART_ASYNC_API or UART_INTERRUPT_DRIVEN
options to the Kconfig Kconfig.test.

If either UART API options listed are selected, the
RING_BUFFER option must be selected. This is now handled
automatically by Kconfig instead of causing a build
assert.

The asserts where added with this PR #59880, and are
removed in this commit.

Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
2023-09-28 16:38:30 -04:00
Bjarki Arge Andreasen
ebd6681589 drivers: serial: serial_test: Patch irq_isr set to undefined
This commit fixes an error where the irq_isr callback is set
to an undefined variable instead of NULL.

Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
2023-09-28 16:38:30 -04:00
Jeroen Reeskamp
1134245ac9 sensors: lsm6dso: Values now match better with the ODR values.
Values are specified in the datasheet(page 30, table 18).
Values match with values defined in lsm6dso-common.yaml

Signed-off-by: Jeroen Reeskamp <jeroen.reeskamp@vention.nl>
2023-09-28 12:21:54 -05:00
Henrik Brix Andersen
a9d3935fa0 drivers: can: solely use sjw from devicetree for initial timing
Update the CAN controller drivers to solely use the sjw and sjw-data
devicetree properties for setting the initial timing when devicetree timing
parameters are specified in Time Quanta (TQ).

Any timing set via the CAN timing APIs will contain either user-provided or
automatically calculated SJW values. This includes any timing parameters
calculated from bus-speed and bus-speed-data devicetree properties.

Update the CAN controller driver tests accordingly and remove the
CAN_SJW_NO_CHANGE definition as it has lost its meaning.

Fixes: #63033

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-09-28 16:28:56 +02:00