Commit graph

23353 commits

Author SHA1 Message Date
Mateusz Sierszulski
b36a31fd7a drivers: entropy: Add Gecko trng driver for EFR32BG22
This commit enables entropy driver on EFR32BG22 SoC.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-01-12 15:22:11 +00:00
Erwan Gouriou
6cbb3f5eec drivers: clock_control: stm32: Fixed domain clock configuration
In some case, we may need to describe a domain clock for a device
while there is no way to configure it (ex: USB clock set on PLL_Q output
on F405 devices > It is not selectable).
Then, configuring a device clock domain in the clock_control driver
will allow to retrieve its subsys rate.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-12 12:46:53 +01:00
Kai Vehmanen
8374325062 drivers: dai: intel: dmic: don't use assert for error handling
The dai.h interface does not prohibit calling dai_config_get()
with different direction values. The dmic driver should handle
invalid direction value explicitly and not rely on an assert.

Link: https://github.com/thesofproject/sof/issues/6896
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-01-12 10:01:41 +01:00
TOKITA Hiroshi
e55cbb8ce6 drivers: spi: gd32: Add support DMA transfer
Add supporting DMA-based transfer for GD32 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2023-01-11 08:50:56 -08:00
Johann Fischer
b5bfd3b12c drivers: udc: fixup parameter endpoint description
The description was still from the early stages of development.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-01-11 17:44:50 +01:00
Johann Fischer
2cab3a8243 drivers: usb: udc_kinetis: fix race condition in Kinetis USBFSOTG
Periodic enqeueu of buffers can cause a attempt to start
a new transfer even though an endpoint is already busy.

Split usbfsotg_xfer_start() into two function, one to start
next transfer and another to continue the transfers, and use
busy state flags to explicitly mark an endpoint busy.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-01-11 17:44:50 +01:00
Johann Fischer
00adb2a539 drivers: udc: remove no more required pending state flag
Pending state flag was only used by the UDC nRF USBD driver.
With the introduction of busy state flag it is no longer needed
and can be removed.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-01-11 17:44:50 +01:00
Johann Fischer
a033784c7e drivers: usb: udc_nrf: fix race condition in nRF USBD
Periodic enqeueu of buffers can cause a attempt to start
a new transfer to host even though an IN endpoint is already busy.
Use busy state flags to explicitly mark an endpoint busy.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-01-11 17:44:50 +01:00
Johann Fischer
baef621bed drivers: udc: add helper functions to set/check endpoint busy state
Add helper functions to set and check endpoint busy state.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-01-11 17:44:50 +01:00
Johann Fischer
c1860326d1 drivers: udc: avoid NULL pointer dereferencing if endpoint is invalid
Immediately return NULL if endpoint configuration is not available.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-01-11 17:44:50 +01:00
Erwan Gouriou
3b92034b57 drivers: ethernet: stm32_hal: Rework data provisionning style
Use more concise and readable style.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-11 17:07:20 +01:00
Erwan Gouriou
8eee0afa1f drivers: stm32_hal: Add option to enable HW checksum
Provide a Kconfig option to enable HW RX and TX checksum, which
can increase throughput performances.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-11 17:07:20 +01:00
Fabio Baltieri
afd766d2b3 drivers: xec_qmspi: add missing default y to SPI_XEC_QMSPI_FULL_DUPLEX
Add missing "default y" to the Kconfig option so that it gets selected
automatically when a matching devicetree node is enabled.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-11 09:11:03 -06:00
Marc Desvaux
ae2cf06f0b drivers: ethernet: fix error UDP server on STM32
With ETH_STM32_HAL_API_V2 avoid log error message
if error log report:
we have problems if the traffic is high


Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-01-11 09:42:00 +01:00
Mulin Chao
b1214ead19 driver: i2c: npcx: simplify smb bank registers with union
For NPCX SMB/I2C SMB modules in FIFO mode, the registers include:

* Common registers, offset 0x00-0x0f, accessible regardless of the value
  of BNK_SEL
* Bank 0 registers, offset 0x10-0x1e, accessible if BNK_SEL is set to 0
* Bank 1 registers, offset 0x10-0x1e, accessible if BNK_SEL
is set to 1

In the current driver, it uses two structures, `smb_reg` and
`smb_fifo_reg`, to access `Common + Bank 0` and `Common + Bank 1`
registers. But It might be easy to misunderstand that they are two
different modules.

This CL tries to simplify this by the following steps:

1. Use `union` to combine `Bank 0/1` registers in the same structure.
2. Remove `smb_fifo_reg`. We needn't use two structures to present
   SMB registers.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-01-11 09:40:36 +01:00
Francois Ramu
302983fd7d drivers: flash: stm32 qspi driver correct device size
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
The HAL_QSPI_Init() accepts Init.FlashSize where "FlashSize+1
is effectively the number of address bits
required to address the flash memory."
To get 64MBytes = 2^26, the value of the Init.FlashSize must be 25.
and bit written to the DCR = 25.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-11 09:39:47 +01:00
Francois Ramu
4500dba078 drivers: flash: stm32 ospi driver correct device size
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
To get 64MBytes = 2^26, the value of the Init.DeviceSize must be 26.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-11 09:39:47 +01:00
Francois Ramu
2cca8b54a3 drivers: flash: stm32 ospi driver prepare sfdp command
Change the stm32_ospi_read_sfdp to have AddressSize
prepared in one single condition.
Add more debug msg.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-11 09:39:47 +01:00
Michał Barnaś
0918442ba6 ec_host_cmd: add ITE SHI peripheral for the host commands
This commit adds the support for host commands being transported
by the Serial Host Interface on the IT8xxx2 SoC.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2023-01-11 09:38:45 +01:00
Michał Barnaś
3ae105e76b ec_host_cmd: add NPCX SHI peripheral for the host commands
This commit adds the support for host commands being transported
by the Serial Host Interface on the NPCX SoC.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2023-01-11 09:38:45 +01:00
Michał Barnaś
cbb6742855 ec_host_cmd: add Kconfig to set ec host commands logging level
This commit adds Kconfig CONFIG_EC_HC_LOG_LEVEL that sets the logging
level of host commands subsystem.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2023-01-11 09:38:45 +01:00
Nick Ward
658b618289 drivers: pwm: add NXP PCA9685 controller
Adds PCA9685 16-channel, 12-bit PWM Fm+ I2C-bus LED controller

Signed-off-by: Nick Ward <nix.ward@gmail.com>
2023-01-11 09:38:18 +01:00
Tom Burdick
15786ce648 sensor: tdk 42688 driver
Adds a driver for TDK InvenSense 42688 six axis IMU. Verified using
the sensor shell sample app via:

- sensor info
- sensor get icm42688p@0

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Yuval Peress <peress@google.com>
2023-01-10 14:45:36 -06:00
Francois Ramu
c14670abea drivers: timer: lptim timer clock on stm32u5 has a prescaler
The stm32 devices shows a x2 factor on the LPTIM1,3,4
clock source but it acts as a prescaler.
The max lptim counter (timebase) is counting 4 sec
In that case, the LPTIM count unit is double.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-10 15:54:25 +00:00
Mathis Raemy
c4b07e8321 drivers: flash: bug fix inline function was not inlined
During flash operation, you have to disable XiP which force function
to be located in RAM. On top of that, the function `flash_put_cmd_addr`
is time critical so we need to declare as inline. For some reason,
sometimes the function was not really inline. Changed it to
ALWAYS_INLINE fixed the bug.

Signed-off-by: Mathis Raemy <mathis.raemy@gmail.com>
2023-01-10 09:26:37 +01:00
TOKITA Hiroshi
c1fc906599 drivers: counter: gd32_timer: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
33963c43ca drivers: counter: nrfx_timer: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
21dc3f58e4 drivers: counter: nrfx_rtc: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
429b05a79a drivers: counter: stm32_timer: remove counter_stm32_is_bit_mask() function
Remove implementation of counter_stm32_is_bit_mask() and
Use IS_BIT_MASK() macro.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
Chris Friedt
8659e2f69e libc: minimal: include: move fcntl.h to posix
The `fcntl.h` header has never been a part of ISO C so move it to
`include/zephyr/posix`.

To ensure a smooth migration, a header was left in
`lib/libc/minimal/include` that prints a deprecation warning.

Users should either include `<zephyr/posix/fcntl.h>` or switch to
`CONFIG_POSIX_API=y`.

Signed-off-by: Chris Friedt <cfriedt@meta.com>
2023-01-10 09:02:21 +09:00
Erwan Gouriou
773f96b763 drivers: stm32: stm32_hal: Generate device id based mac address
In case user didn't set mac address in any way (locally defined or
randomly generated), define mac address using device unique id.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 19:22:54 +01:00
Erwan Gouriou
179963899e drivers: ethernet: stm32_hal: Move mac address configuration to dt
Deprecate Kconfig mac address related symbols and replace by existing
device tree properties:
- local-mac-address
- zephyr,random-mac-address

User who wants to keep using deprecating method of defining random
MAC address using Kconfig should set CONFIG_ETH_STM32_HAL_RANDOM_MAC=y.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 19:22:54 +01:00
Erwan Gouriou
eee1d7fc66 drivers: ethernet: stm32_hal: Centralize mac address configuration
Get the mac address be set in a central function rather than split
between 2 places.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 19:22:54 +01:00
Erwan Gouriou
ddb457a8d9 drivers: ethernet: stm32_hal: Make MAC address setting method a K choice
In order to ease deprecation of these methods (in favor of dt based
configuration), introduce a choice for MAC address configuration method.

Default to random method (no change).

User wanting to still use ETH_STM32_HAL_MACX symbols should define
CONFIG_ETH_STM32_HAL_USER_STATIC_MAC=y

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 19:22:54 +01:00
Jani Hirsimäki
e92b067b7f net: ip: net_context: AF_PACKET/SOCK_RAW/IPPROTO_RAW: set pkt family
Setting a detected packet family (ipv4 or ipv6) in net_context level
instead in lower layers for AF_PACKET/SOCK_RAW/IPPROTO_RAW type sockets
when sending data.

Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
2023-01-09 19:21:18 +01:00
Marco Peter
ec3857dbcf drivers: flash: stm32: Use consistent log priorities
Any error erasing the flash might want to log
the event with "ERROR" priority.

Signed-off-by: Marco Peter <marco.peter@joylab.ch>
2023-01-09 19:19:49 +01:00
Flavio Ceolin
24cb520698 timer: hpet: Remove deadcode
Move hpet_int_sts_set to inside HPET_INT_LEVEL_TRIGGER guard.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-01-09 12:07:28 -05:00
Gerard Marull-Paretas
a6575e5834 drivers: regulator: npm6001: add support for BUCK1/2 disable
BUCK1/2 are defined as "always on" regulators, however, there is a
special override register that allows to turn them on/off.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-01-09 16:19:09 +00:00
Gerard Marull-Paretas
7feb008c85 drivers: regulator: common: allow to specify on by default
Some regulators are enabled by default, however, such condition cannot
be captured now by the regulator driver API. Refactor
regulator_common_init_enable to regulator_common_init (enable removed,
as it also sets mode) and add a new argument to specify such condition.
With this change, regulator_disable() and regulator_is_enabled() work as
expected without a first call to regulator_enable().

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-01-09 16:19:09 +00:00
Raul Pando
cd1d7e4bb8 drivers: usb: make USB VBUS sensing configurable for STM32 devices
Vbus detection is required by self-powered, with external non-USB
supply, devices to have an operational USB peripheral. The voltage
sensing, when enabled, is performed via a designated pin (PA9 is
the most common).

For greater details see section 2.6, ST application note AN4879.

Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
2023-01-09 15:26:21 +00:00
Erwan Gouriou
079470be02 drivers: clock_control: stm32: Fix HSI48 oversights
Take into account HSI48 when computing susbys rate.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 14:01:28 +00:00
Patryk Duda
09277d44e3 drivers: watchdog: Make SOC reset as an option in counter watchdog
When using watchdog which doesn't support callbacks (e.g. STM32 IWDG)
it's very useful to have counter based watchdog with shorter timeout.
This way we can gather useful information before IWDG resets SOC.

In above case it's usually not desired to reset SOC when counter
watchdog is triggerd, because we can lose information about reset cause.
For example, STM32 can determine if the reset was caused by watchdog.

Another use case for counter watchdog without SOC reset is to detect
slow code paths.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2023-01-09 10:15:33 +01:00
Guillaume Gautier
3e6c9c40aa drivers: counter: Properly deprecate Kconfig symbols in STM32 RTC driver
Now that both RTC source clock Kconfig symbols are disabled by default,
we invert the ifdef so that in the absence of configuration we still
fall in the LSI configuration.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-09 10:14:35 +01:00
Guillaume Gautier
1cbc1c14f0 drivers: counter: Deprecate Kconfig STM32 source clock
Following #50104, properly deprecates old Kconfig symbols concerning
RTC source clock and makes them optional to have them disabled by
default.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-09 10:14:35 +01:00
Erwan Gouriou
af0576b7ea drivers: flash: stm32: Remove useless Kconfig
SOC_FLASH_STM32_V1 is not used anymore.
Remove it

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:49:12 +01:00
Erwan Gouriou
cc1601fde7 driver: flash: stm32: Use compat information to select file to build
Now that compatible is directly linked with driver version,
use DT compat based Kconfig flag to build the correct flash driver
version.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:49:12 +01:00
Erwan Gouriou
a934cce35b drivers: flash: stm32: Rename v1 driver into f1x
Instead of introducing a vX driver version, use series name.
With this commit F0, F1, F3, L0 and L1 series are using F1 flash driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:49:12 +01:00
Daniel DeGrasse
29c53f4f6a drivers: adc_mcux_lpadc: add clock setup for RT5xx SOC
Add clock setup code for RT5xx series SOC to LPADC driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-08 19:48:54 +01:00
Erwan Gouriou
c5ab922f50 drivers: hci: stm32wb: Use clock_control driver for clock configuration
Instead of relying on STM32Cube API, use clock_control framework
for clock configuration inside this driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:48:27 +01:00
Erwan Gouriou
f3e788e84e drivers: hci: stm32wb: Refactor c2_reset()
In preparation of the introduction of dt configured clock in this
driver, refactor clock related clocks.
- remove start_ble_rf()
- Move  IPCC clock activation in c2_reset()

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:48:27 +01:00