The pga enum internal reference voltage and gain values
were fixed in the code, but a comment was forgotten to be
updated. Correct the comment to match how the code uses
the enum.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This patch ensures that the power domain to which the current HD DMA
instance belongs is power-up first.
In addition, it initializes the channels when coming out of SUSPEND
state, so this operation will be performed also when the stream is
started after the DSP comes out of D3 state.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Change the assertion when evaluating the baudrate to trig if
result is greater or equal to 16.
This will also match the comment : checking BRR.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The tachometer collects the data continuously setting a "data ready" bit
when it's ready. The availability bit has to be cleared before the
register is updated.
The driver also supports underflow detection, when the bit indicating it
is set the reading of "0" is returned.
The problem here is that there is that once the underflow bit is cleared
we might end up reading stale data.
To prevent that clear the "data ready" bit when underflow is detected
Signed-off-by: Kornel Dulęba <mindal@semihalf.com>
Fix the OTRIG related build error in the DMA LPC
by defaulting num_of_otrigs to 0 if a plarform using
the LPC DMA does not specify this property in devicetree.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
For Intel cavs2.5, access from LPGPDMAC to Audio Link Hub
RX/TX registers needs to be explicitly enabled before use.
The logic follow hardware initialization done in
SOF project sof/src/platform/intel/cavs/platform.c
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Found EMSDP board SPI-FLASH sample broke after adding DFSS
into spi_dw. Found wrong interrput mask resulting in false
interrupt enabled. Now fixed it to fit both DFSS and DW.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
This is a follow-up to commit 09fa46ee4e.
Before nrfx 3.0, the QDEC interrupt on REPORTRDY event was activated
implicitly when a `reportper` value other than `DISABLED` was used.
Now, the `reportper_inten` field needs to be used to activate this
interrupt.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
There is no need for iterating all the Bosch M_CAN filter elements in
Message RAM in order to find a free filter as the driver already keeps
track of assigned filters.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Restructure the Bosch M_CAN driver backend to use per-instance Message RAM
configuration.
This removes the need for a common, artificial "can" devicetree node for
SoCs with multiple Bosch M_CAN-based CAN controllers and allows for
per-instance configuration of the number of e.g. standard (11-bit) and
extended (29-bit) filter elements.
As part of the restructure, software handling of CAN filter flags was moved
from per-flags bitfields to per-filter bitfields, solving an issue when
using more than 32 standard (11-bit) filter elements or more than 16
extended (29-bit) filter elements.
Fixes: #42030, #53417
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Bosch M_CAN Message Marker, an 8-bit field copied from Tx Buffer
elements to Tx Event FIFO elements to aid software in identifying Tx frame
status, need not be split into an index and a count, as the count is
unused.
Remove this split and replace "struct can_mcan_mm" with a simple "uint8_t".
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Message RAM layout used by the STM32 FDCAN IPs contains a fixed number
of elements, even though the software can opt to use less standard/extended
filter elements. Change the BUILD_ASSERT() statements to reflect this.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let the Bosch M_CAN front-end drivers supply their own Message RAM
read/write/clear functions.
This is preparation for supporting per-instance Bosch M_CAN Message RAM
layouts and for accessing Bosch M_CAN IP cores over peripheral busses.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch the Bosch M_CAN devicetree binding to use a bosch,mram-cfg property
for specifying the memory layout of the Bosch M_CAN Message RAM. This is
identical to the Linux kernel devicetree binding for Bosch M_CAN IP core
based CAN controllers.
This introduces an offset cell which can be used for controllers with
shared Message RAM between Bosch M_CAN instances.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Document that the Bosch M_CAN read/write register functions are allowed to
return -ENOTSUP for unsupported registers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Basically, once a pin is configured for interrupt, we enable the latch
on it, in order not to miss short pulses.
The bottom half of the interrupt then reads the input port twice, to
read the latch and then read the potentially new state of the pins, to
compute the posedge, negedge, and level callbacks accordingly.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
When accessing GPIO by pin, access only the required port register
(instead of systematically accessing both PORT0 and PORT1).
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
In case of BG95 where there is no reset pin, reseting the board
which uses a BG95 modem could result in powering-off the modem
(as oposed to "reset" the modem). This commit is an attempt
to handle this case and re-power the modem.
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
Using bg9x driver with bg95 specifically has the issue that BG95
modem replies with "RDY" when it's not fully initialized and AT
commands sent to the modem after this point would result in modem
reply of "ERROR". This commit adds a new prj.conf field in the build
configuration for custom unsolicited app ready string, with
the default being BG96 one ("RDY").
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
The BG95 pin configuration does not internally ever use the reset pin.
Because of this, there is no need to make reset pin mandatory.
Commit removes reset pin dependency [e.g. in case of BG95].
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
Add a property to the ADC channels which allows the configuration
of the current source pin.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This PR relocates the sensor trigger sample application from the
`sensor_shell` sample to a subcommand in the actual sensor shell. The
subcommand has a UI for enabling a given trigger on a given sensor.
A built-in handler for the data_ready trigger is included that prints
the latest data to the log. Currently, only `SENSOR_TRIG_DATA_READY` is
supported but the groundwork is there to add others. Tested on a
`tdk_robokit1` board.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Clean up whitespace etc. using clang-format after previous changes. No
functional changes intended.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Added support for interrupt-driven GPIO for this driver if an interrupt
line is defined. Note that interrupt support is optional in the GPIO
core so it may or may not be present.
The core provides a single state change notification whenever any line
changes state on a given bank, so we need to check the states of the
lines ourselves to determine what has actually changed.
Also, the driver treats the first and second GPIO banks as mostly
separate devices, but a single interrupt is shared by both banks, so the
ISR ends up being registered by the first bank which also triggers
handling on the second bank if required.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The properties being read for the all-inputs and all-outputs flags in
the driver for the second GPIO channel did not match the ones listed in
the DT schema or the existing device tree files. Fix this.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Added to the configuration function to enable
channel chaining for the DMA_LPC that utilizes
the total of the SOC OTrig channels.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Use CONFIG_USB_DC_NXP_LPCIP3511 instead of FSL_FEATURE_USB_USB_RAM
as the behaviour variation is based on the SDK driver used and not
if the SoC has a dedicated USB SRAM.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Conditionally enable the USB_DC_HAS_HS_SUPPORT as the
USB_DC_NXP_LPCIP3511 controller can have both HS and FS only.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Ports the Jinghua Display JHD1313 LCD (with RGB backlight) driver
to use the new auxdisplay driver interface. This driver is used on
the seeed grove LCD RGB display, and replaces it.
Signed-off-by: Jamie McCrae <spam@helper3000.net>
If you compile this code with Clang it will complain about casting a larger
type into a smaller enum.
```C
zephyr/drivers/clock_control/clock_control_nrf.c:120:37:
warning: cast to smaller integer type 'enum clock_control_nrf_type'
from 'clock_control_subsys_t' (aka 'void *') [-Wvoid-pointer-to-enum-cast]
enum clock_control_nrf_type type = (enum clock_control_nrf_type)subsys;
```
Adding `size_t` to the cast removes this issue. Another option could be to
add `-Wno-void-pointer-to-enum-cast` flag to the compile flags.
Signed-off-by: Sigvart Hovland <sigvart.hovland@nordicsemi.no>
The indended value for the delay after the software reset of adxl372 is
1ms. Adjust the value accordingly.
Fixes: a3e7cea
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Driver should just say the channel is not busy if
it is not setup rather than returning an error.
Also, change the channel index to int8_t rather
than uint32_t since it is being assigned negative
values and that width is more appropriate.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
