This is a follow-up to commits cf871aec64
and 205e684958.
It turns out that the current implementation of the nrf_rtc_timer may
still fail to properly handle a timeout if that timeout is set in very
specific conditions - when a previously set timeout is about to expire.
When that happens, the new timeout is handled 512 seconds later (when
the system timer overflows) than it should be.
A recently added nrf_rtc_timer test case (test_tight_rescheduling)
exposes this problem and this commit fixes it by adding examination
of COMPARE events that appear during setting of the CC register value
for a given timeout.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This function name is misleading as the absolute time values handled
by the driver are 64-bit and this function receives a 32-bit parameter,
which is supposed to be a CC register value, not the target time.
Correct the name of this function and its parameter, and remove a now
unnecessary masking from its body.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
I believe this comment and condition may have found its way into the
rp2040 driver from other drivers where it makes more sense. For
example for the stm32 driver performing a read on the EP0_IN endpoint
turns it silently into a read on the EP0_OUT endpoint. As far as I can
tell, this really was only used to consume 0-length Status-Stages of
to_host control transfer in the other drivers.
Note that usb_dc_ep_start_read() is never called in an IN endpoint
in the rp2040 driver, and furthermore, even if it would have been
called like that, the current implementation would not do the silent
change into actually performing a read on the EP0_OUT endpoint instead,
so the condition and comment is just wrong.
Note that 0-length Status-Stage of to_host control transfers is
currently consumed in this driver by usb_dc_ep_read_continue().
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Since not all GPIOs support voltage selection, voltage flag
is only set if voltage selection register is present.
fixes: #54366
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The data stage of Control transfers that are sent from Host to Device, can
be made out of multiple OUT transactions, if the amount of data to be
transmitted is larger than the endpoint size. When this happens, the DATA
pid should be toggling. The USB Device driver of the pico must correctly
prime the EP0_OUT buffer with the correct data PID, otherwise the hardware
will reject the received transaction.
Before this change the driver used to always prime EP0_OUT with a DATA1
pid.
After this change the driver only uses DATA1 pid after a setup transaction,
and then toggles the pid for each transaction.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
On a repeated dma_start, the stm3u5 dma driver should return
immediately if it is already started.
On a repeated dma_stop, the stm3u5 dma driver should return
immediately if it is already stopped.
This like the dma driver does for other stm32 series.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Correct bit mask for RF2XX_RX_TRAC_BIT_MASK. Current mask produce dead
code warnings when comparing to value:
RF2XX_TRX_PHY_STATE_TRAC_INVALID = 0x07
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
cy8c95xx I2C GPIO support was broken in commit 4b30008 due
to wrong i2c bus and addr were wrote during GPIO_PORT_INIT.
Now fix this issue.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
Address map used for config item `uart_dev` and `uart_regs` is
currently derived using the rpi hal macros `uart0` and `uart1`
which map to the same register address as given in the `reg` property
of the devicetree.
However, the sdk macro is generated using `uart##idx` which zephyr does
not necessarily map to uart0 or uart1.
This is, for example, the case when disabling uart0 with the devicetree
status "disabled"
and enabling uart1 for which then the idx==0 and not 1 which therefore
maps to the wrong controller address space.
This can simply be fixed by deriving the base address from
`DT_INST_REG_ADDR(idx)` instead
Signed-off-by: Ramon Aerne <ramon.aerne@axelera.ai>
PR #30403 implemented nocache regions for ethernet DMA buffers in sram3 to
fix issue #29915. Unfortunately, some STM32H7 variants do not have any
sram3 so they still suffer from #29915.
All H7 variants have sram2 though, so use that for targets without sram3.
Signed-off-by: Björn Stenberg <bjorn@haxx.se>
ETH MAC config for STM32H7X and STM32_HAL_API_V2
too late and fails #54409
call HAL_ETH_SetMACConfig before HAL_ETH_Start_IT()
check the return of HAL_ETH_SetMACConfig()
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
This is done with a function call for better readability.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the LOG_WRN is used on stm32 uart driver it could block
execution : when pin state for sleep mode is not defined by the DTS
even if no error is raised, LOG_ msg is crashing when entering sleep mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit changes the ability to keep the RTC value between resets, and
turns it off by default.
Though this feature makes sense for an RTC counting the time and date,
here it is used as a counter. As such the registers used for coutning
should be reset after each MCU reset.
This change puts back in place the previous behavior before the Kconfig
CONFIG_COUNTER_RTC_STM32_BACKUP_DOMAIN_RESET was removed.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
With CONFIG_ETH_STM32_MULTICAST_FILTER=n, MACFFR was being set to 0 instead
of ETH_MULTICASTFRAMESFILTER_NONE, blocking all multicast traffic.
Instead, reset all the relevant bits first, then set either
ETH_MULTICASTFRAMESFILTER_HASHTABLE or ETH_MULTICASTFRAMESFILTER_NONE
depending on Kconfig.
This issue was introduced in #53850, `git diff a5f9fc2~2 a5f9fc2` (the
total diff of that PR) shows what happened - the
`tmp |= ETH_MULTICASTFRAMESFILTER_NONE;` line was removed completely
instead of being gated by `!defined(CONFIG_ETH_STM32_MULTICAST_FILTER)`.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Requesting page layout triggers filling bank array
only once, and returns pre-filled array on consequential calls.
But ignores array size.
Remember size of this array as well.
Fixes#54563
Signed-off-by: Maciej Zagrabski <mzi@trackunit.com>
MMC was using SDMMC kconfigs to build disk driver.
This is incorrect, MMC and SDMMC should not be sharing
Kconfigs. Split the drivers/disk/Kconfig.sdmmc into
drivers/disk/Kconfig.mmc and drivers/disk/Kconfig.sdmmc.
Also update disk tests to account for new MMC Kconfigs.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The fast tx/rx/txrx functions will leave the SPI bus in an
inoperable state if interrupted, potentially spinning forever waiting on
some data. Wrapping these operations in what amounts to a critical section
using spin locks to avoid the issue.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add support for side B channels in MCUX LPADC driver. Given
that no instances of the IP block have more than 8 a side channels,
use channel numbers over 8 to indicate side B channel is desired.
Fixes#51076
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
PSM hibernate mode would draw excessive current
because the UART would be enabled if CTS went low.
In hibernate mode, do not use CTS to power on the UART.
Fix reading of input pin states for low power by reading
the raw value.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Change event callback lock to a semaphore to avoid
priority issues the mutexes can cause.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This driver enables a number of interrupts it does not attempt to handle.
This results in "unhandled IRQ: 0x...." messages being printed, and the
interrupt handler retriggers immediately again, and this happens again
and again forver, because nothing ends up clearing the interrupt.
This change implements very limited handling of these interrupts. A custom
warning is logged, and the interrupt is cleared.
This change does not imply that doing this is sufficient. More changes may
need to be implemented to more gracefully re-start transactions or
re-arm some endpoints, but this is one step in the right direction,
and at least the OS doesn't freeze up.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Align driver with changes introduced in the hal. `nrf_timer_frequency_set`
was changed to `nrf_timer_prescaler_set`, update driver accordingly.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver currently stores num_keys in both config and data. Drop the
data copy, save 4 bytes of RAM.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add code that acts accordingly when a transaction does not complete
in the expected time. It makes sure that the transaction is aborted
so that no unexpected interrupt occurs afterwards and it also cleans
up after that abort so that the driver can handle further requests.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
UNUSED_L2_START_ALIGNED is a marker of first page not used by the
linker. Starting from this page, the memory may be re-mapped.
assertion <= is banning remapping of the first unused page
changing to <
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Update the calculation of the row and column.
Issues were seen when running the LVGL sample.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The driver is missing the GPIO initialization entirely, meaning that
flags like PULL_UP are not currently being applied. Add the missing
call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The introduction of cc2c05a90c caused
CONFIG_MCUX_LPTMR_TIMER to always be enabled for boards where the NXP LPTMR
is enabled in the board devicetree.
Using this low-power timer as system timer only makes sense when using
power management. Otherwise, it just results in a lower tick resolution and
non-tickless operation.
Add dependency on CONFIG_PM for CONFIG_MCUX_LPTMR_TIMER.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
New Zephyr WDT driver for TI CC13xx/CC26xx family.
Supports interrupts & MCU soft reset on timeout.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Fix two "unused variable" warnings when compiling with assertions
disabled. The two variables are used only in the __ASSERT() call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix a build error when the driver is built with:
CONFIG_PM=y
CONFIG_PM_DEVICE=n
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_CONSOLE_INPUT_EXPIRED=y
due to uart_xec_pm_policy_state_lock_get() and rx_refresh_timeout_work()
declared under different configuration options.
Fixes: 343d1919f1 "uart: microchip: add low power & wake support"
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
To follow the IWDG configuration sequence, the timeout install is
just preparing the reload and prescaler parameters.
Then during the iwdg setup the watchdog is enabled and configured
at the same time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. Do not copy over the data to the local buffer,
it can be directly sent to the controller. The
cache is flushed before calling the HAL send
function. Also do not allocate a buffer from
the heap pool for the write operation.
2. Remove a length check as this is handled by
the HAL driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add support for automatically configuring GPIO hogs defined in the
devicetree during system initialization.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
It is not guaranteed that a multi-core RISC-V hart numbering scheme
will match Zephyr's sequential cpu numbering scheme. Read the hartid and
use that value in calculation to get mtime_cmp reg, instead of the
current_cpu id.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
changes to support low power and wake support in microchip xec uart
driver. Add support for wakerx_gpio config in dts to select the wake gpio.
Configure for wake in PM_DEVICE_ACTION_SUSPEND state and clear
interrupt in wake isr. Also added support for
CONFIG_UART_CONSOLE_INPUT_EXPIRED
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
New capability is to be used by the stack to adjust the corresponding
field in the device descriptor.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
udc_ep_flush() is not implemented by the driver and is not
used by the USB device stack. Remove it for less confusion
when porting drivers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
