The stm32H5 mcu has an independent USB supply to be enabled
at init with LL_PWR_EnableVDDUSB function like the stm32U5 serie.
Both series have PWR_USBSCR_USB33SV bit in their USBSCR POWER reg.
and other series all have PWR_CR2_USV bit in their CR2 POWER reg.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Boot into the deep power down state when `SPI_NOR_IDLE_IN_DPD` is not
enabled. DPD is the correct hardware state for the `SUSPENDED` software
state. Without this change, it takes a cycle of
`SUSPENDED->ACTIVE->SUSPENDED` to get to the low power state.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The previous behaviour led to an issue where we already expected data1
on the first transfer instead of data0. The DesignWare USB DC actually
implements the same behaviour. Also, the next_pid flag has to be reset
on setting up the endpoint.
Fixes#66283.
Signed-off-by: Manuel Aebischer <manuel.aebischer@netmodule.com>
The driver right now re-enters polling mode a couple times after the
matrix has been detected as stable as the key interrupt is still pending
and fires again once detection is reenabled.
Clear pending WUI interrupts before reenabling key press detection to
avoid that.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Information about IOAPIC can be located not in the first
DMAR Hardware Unit Definition subtable. Iterate them all.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Fixes uninitialized variable return by returning zero
at the end of function.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
This code fixes following issue:
The TX data chunk (with NORX set) is send to chip (via SPI) and at the
same time a frame is received (by the LAN8651 chip), there will be no IRQ
(the CS is still asserted), just the footer will indicate this with the
rca > 0.
Afterwards, new frames are received by LAN865x, but as the previous footer
already is larger than zero there is no IRQ generated.
To be more specific (from [1], chapter 7.7):
----->8-------
RCA – Receive Chunks Available
Asserted:
The MAC-PHY detects CSn deasserted and the previous data footer had no
receive data chunks available (RCA = 0). The IRQn pin will be asserted
when receive data chunks become available for reading while CSn is
deasserted.
Deasserted:
On reception of the first data header following CSn being asserted
------8<------
Doc:
[1] - "OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface"
OPEN_Alliance_10BASET1x_MAC-PHY_Serial_Interface_V1.1.pdf
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The description is a bit misleading as the packet is not even read in
the mentioned case by the OA TC6 Zephyr driver.
When the timeout occurs the data (packet) received by LAN865x may be:
- Read latter if still in the RX buffer of LAN865x
or
- Is (probably) dropped by LAN8651 itself as the RX buffer gets overrun
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The parity of the received footer from data transfer (also including the
NORX) shall be checked before members of struct tc6 are updated.
This prevents from updating the driver's crucial metadata (i.e. struct
oa_tc6) with malformed values and informs the upper layers of the driver
that error has been detected.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
With the current approach, the driver prevents from TX transmission
when waiting on timeout (standard 100ms) for available memory to be
able to allocate memory for RX packet.
It is safe to just protect the part of reading chunks. In that way
pending TX transmission can be performed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
If the DT node for mdio of nxp enet has a mdc freq specified,
use this when configuring the module.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
In init function, start timer with period CYC_PER_TICK if tickless is
not enabled, This change is for fixing the issue that disabling
CONFIG_TICKLESS_KERNEL the OS tick is not work issue, this
causes the OS not starting scheduling correctly.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
This commits create the dts binding for Ambiq BT HCI instance.
And create the SPI based common HCI driver for Ambiq Apollox
Blue SoC and the extended soc driver for HCI.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Fix a possible race condition in the keyboard matrix library where a key
would get pressed between the last read and reenabling the (edge
sensitive) interrupt and the even would be lost.
The window for this to happen is very narrow and had to artificially add
a sleep to reproduce it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the interrupt setup from both edge to edge to active. Edge to
active is all was needed anyway and it makes this compatible with gpio
controller that only support single edge interrupt.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a device driver to read events from a Linux evdev device node and
inject them back as Zephyr input events.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The driver currently supports only dedicated FIFO mode (with
dynfifosizing if enabled). Control, bulk and interrupt transfers are
supported, isochronous transfers are not yet supported. The driver
accesses controller registers using sys_io.h, but for debugging purposes
one can get a register map from the driver's config, similar to the
usb_dc_dw.c driver.
Initial support also has vendor quirks for the STM32F4 SoC family.
Tested on NUCLEO-F413HG.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Use new common header and remove usb_dw_registers.h.
No functional changes, only renaming of registers and field identifiers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This header is based on drivers/usb/device/usb_dw_registers.h and
describes registers of the DWC2 controllers IP and is intended for use
in both device controller drivers and a host controller driver. The
difference to usb_dw_registers.h is that this header does not confuse
offsets with bit positions, contains all the definitions required for
device mode, has register and bit field names identical to the databook
and no annoying underscores.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
If GDBSTUB is enabled and the kernel runs in tickless mode, the timer
must not convert the delta cycles to a 32-bit data type (cycle_diff_t in
this case). The delta_ticks variable would overflow and the next timeout
would be set before the current timestamp, thus generating an interrupt
right after leaving the handler. As a result, the system would receive
tens of thousands of interrupts per second and would not boot.
Cc: Michal Sojka <michal.sojka@cvut.cz>
Signed-off-by: Marek Vedral <marek.vedral@gmail.com>
rtc_get_time() on STM32 does not implement the -ENODATA return code.
This prevents testing the initialisation status of the RTC.
Fixed by reading INITS flag and adding a error path in
rtc_stm32_get_time().
Signed-off-by: Adrien Bruant <adrien.bruant@aalberts-hfc.com>
This reverts commit bffa0c6bddbc91d39f4b01baa34e3d0595760d50.
This FIFO implementation causes a regression by which the SPI
peripheral generates several spurious SCK cyles after the last
data has been sent.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Its default value (100 ms) resulted in PDUs big enough to never make it
through on a slow enough UART (e.g. ~1152-byte PDUs on a UART@115200).
The UART TXs were silently aborted.
A no-timeout value is now allowed and made the default.
Additional warnings are logged when it is likely that a UART TX
was aborted due to a too low timeout for the used baud rate.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
- Disable UART when the PPP interface is brought down.
This prevents an error when it is next brought up.
- Change the level of certain logs to be less concerning
and less verbose.
- Fix warnings regarding the passed parameter types of %p conversions.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
Add a config entry for the keyboard matrix thread priority. This
changes the current default, but that was pretty much an arbitrary numbe
anyay and the exact one should be picked the application so it should be
alright to do so.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add power management support to the gpio keys driver. When in suspend,
disable all the button gpios and interrupts.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Some targets do not give EoD at the end of a register read. They will
auto increment their address pointer on to the next address, but that
may not be of interest to the application where the buffer size will
only be set to the size of only that register. If the target, does
not give an EoD, then the Controller will give an Abort... but this
should not be treated as an error in this case.
There is still however a case where an abort Error shall still be
considered as an error. Athough the driver does not support it yet,
threshold interrupts are to be used if the length of the buffer
exceeds the size of the fifo. There could be the case where the
cpu can not get around fast enough to pop out data out of the rx
fifo and it will fill up. The controller will just give an abort
as it can not take any more data.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Generic Connector for the apollo4p_evb
Ran tests/drivers/gpio/gpio_basic_api
Ambiq does not support DUAL Edged Interrupts.
Added Connector Usages as defined by the Ambiq BSP.
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Process dest_scatter_interval and source_gather_interval
configurations and accordingly set the source and destination
increment values.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The gpio_pca953x gpio driver doesn't have
the input latch and interrupt mask
configuration which causes a lack of accessing
and using those features on an gpio expander
device. Fix it by adding input latch and
interrupt mask configurations in this driver.
Signed-off-by: Vudang Thaihai <vudang.thaihai@brillpower.com>
Change k_heap_alloc wait duration to K_NO_WAIT in kinetis USB driver,
since the usb_dc_ep_configure function may be called from an ISR
context, where only K_NO_WAIT would be allowed as a duration for this
function.
Fixes#66507
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add power management support to ft5336. The chip can go to hibernate and
reduce power consumption to a minimum, the only way to wake it up though
is by pulsing the reset or wake signal. Only reset is implemented in the
driver right now so only allow this functionality if the reset pin is
defined.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The DMA interface allows start and stop to be called multiple
times and driver should ensure nothing bad happens if the calls
are not balanced.
Fix an issue where after a start-stop sequence the DMA would be
powered down, and then a subsequent stop would result in a crash
as driver accesses registers of a powered down hardware block.
Fix the issue by handling stop without actually reading the hw
registers to check channel status.
Link: https://github.com/thesofproject/sof/issues/8503
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Enable the RNG module interrupt every time it is resumed.
It is done to make sure the interrupt is always enabled. The CR register
may not persist when the device clock is disabled on some chips.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Move enabling/disabling the RNG module to acquire/release functions.
It causes enabling the RNG module for the get_entropy_isr function.
It fixes hanging in the get_entropy_isr function.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
STM32U5X has 128k/256k/512k/1M/2M dual bank Flash.
The address of the 2 bank are continuous, so it's no need a "Dummy page"
in "stm32_flash_layout", which cause wrong slot1 section (for secondary
image), and the BANK2_OFFSET is not right either, which cause
"flash_stm32_valid_range" return a failure.
To fix the issue, just set CONFIG_FLASH_SIZE to STM32_SERIES_MAX_FLASH
Tested on NUCLEO-U545RE with mcuboot.
Signed-off-by: Weifeng Li <weifeng.li@aofrio.com>
Update documentation for SPI_NRFX_RAM_BUFFER_SIZE Kconfig symbol
to reflect new usage of it. Now the symbol specifies size of RX buffer.
The change introducing support for RX buffer placed by a linker in
memory region defined in SPIM devicetree node is in a parent commit
of that one.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
This patch adds support for RX buffer placed by a linker in
memory region defined in SPIM devicetree node. The buffer is placed
in memory region defined as devicetree node. The memory region node's
reference is then stored in `memory-regions` property of SPIM node.
Added build time assertion to check if `CONFIG_SPI_NRFX_RAM_BUFFER_SIZE`
Kconfig symbol has value greater than 0 when given SPIM node has
`memory-region` property.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Fixed Kconfig to remove dependency between modem_socket and
modem_context, the two do not depend on each other and
should be possible to use independently
Signed-off-by: Alessio Lei <alelei94@yahoo.it>
Improve code readability of this driver by simplifying and reworking
some of the source code, formatting and comments.
This commit is not meant to cause any functional difference.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The LIS2DU12 is a linear 3-axis accelerometer with advanced digital
functions whose MEMS and ASIC have been expressly designed to build
an outstanding ultralow-power architecture in which the anti-aliasing
filter operates with a current consumption among the lowest in the
market.
This driver is based on stmemsc HAL i/f v2.3
https://www.st.com/en/datasheet/lis2du12.pdf
Signed-off-by: Armando Visconti <armando.visconti@st.com>
