The initial version of an input driver for Cirque Pinnacle ASIC supports:
* Setting sensitivity
* Choosing between relative and absolute modes
* Relative mode
* Primary tap
* Swapping X and Y
* Absolute mode
* Setting number of idle packets
* Clipping coordinates outside of active range
* Scaling coordinates
* Inverting X and Y coordinates
Signed-off-by: Ilia Kharin <akscram@gmail.com>
To prevent postponing data flush until filling fifo. Now the flush will
occur at the scheduled time, regardless of subsequent poll_out reqs.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
A few lines above this change explicitly enable the UART FIFO. Then this
line, goes and disables it. This seems to be from a workaround where the
parity and stop bits are not coming in correctly in the config. Fixing
that will be another patch. But, the FIFO should always be enabled. This
is visible when trying to use bit rates that are reasonably fast. Even in
IRQ mode, with a sufficient bit rate, bytes are readily dropped.
Tested on a Sparkfun Promicro rp2040 board.
Signed-off-by: David Brown <david.brown@linaro.org>
Automatically select CONFIG_GPIO when the GPIO-controlled CAN transceiver
driver is enabled. Update board configurations to benefit from this.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Cf Errata sheet, 2.2.4: With HSE active, switching the system clock source
from any other source to HSI, spuriously deactivates HSE.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
In case of chain loaded application with PLL set as the sysclk source,
directly exit the init function.
This also applies to exit from stop mode and was tested successfully.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
For now DSI settings are hard-coded for the specific
LCD module used on the STM32H747I Discovery board
Signed-off-by: Erik Andersson <erian747@gmail.com>
To support the NT35510 display, some additional
options needs to be configurable in the STM32
DSI peripheral
Signed-off-by: Erik Andersson <erian747@gmail.com>
The Low Power Flexcomm driver manages the interrupt handling
and provides an API to register interrupt callbacks.
Register the NXP LPI2C interrupt handler.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Update the driver to account for variations in the SDK driver
when it uses the instance number instead of the base address.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
LPFlexcomm is a MFD device hence select this Kconfig whenever
it is enabled.
Remove the selection from the individual driver Kconfig files.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
On some boards, there is not dedicated reset pin for GT911, it might
be the same pin with display IC, or might be tighted to a high level
voltage.
This patch makes the rst_gpio can be empty.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Add support for performing pinctrl operations. For now,
the only supported operation is applying the pinctrl default
state. Pinctrl is left optional to allow for scenarios in which
this is not required (e.g: AMP system in which another
OS configures the pinctrl).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add a property to select the push-pull GPIO output type to drive the
I2C recovery. The default is open-drain.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This patch add supports for performing clock-related operations
on i.MX8ULP. This consists of:
1) Adding a LUT.
2) Adding an initialization function meant to tell the
HAL which rate the XTALs on the boards (EVK and EVK9)
run at. This is used by the functions that compute the
rate of an IP clock.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
In the case of some SOCs simply using the PCC base and clock
offset to build the clock ID passed to the HAL is not sufficient
since the clock ID may also contain some flags (e.g: see the case of
i.MX8ULP). For such SOCs, we change the semantic of the value passed
from the DTS (which is simply called "name", thus allowing us to
interpret it differently from SOC to SOC) to an index in a LUT
used to fetch the clock ID that can be safely passed to the HAL.
For compatibility reasons, we also keep the old way and use it
for SOCs which don't define such a LUT. The driver will decide
which method to use based on the LUT size (i.e: if 0, use the
old way, if != 0 use the new way).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Change, for audio DSP and M7 cores, SOC_<name> to match
the exact soc name.
Update the board files accordingly.
These configs are used in SOF and NXP_HAL, so change
sha for these modules.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Rename ad5592 files in dts, driver and include to ad559x and add support
for I2C bus which is required for AD5593.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Run clang-format on qdec_stm32.c.
This moves '\' in macros to line index 100, which ensures '\' still
aligns if a macro is edited with a new line that is longer than the
previous longest line.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Negative temperatures were converted to the sensor_value struct
incorrectly.
This fixes the causes: signed/unsigned mixups and integer overflows.
Also clarified temperature calculation using multiplier/divisor config
values.
Fixes#68240
Signed-off-by: Boris Mulder <b.mulder@innoseis.com>
Based on the iis2dlpc driver, with some significant differences in
interrupt handling.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add the invocation of an interrupt config function
(config->irq_config_func). Absence of this call results in the DMA
driver not being able to service interrupts raised by the DMA
peripheral.
This case was observed on the i.MX RT685's HiFi 4 DSP domain, where DMA
was not functional because of this.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Enable Transmitter Delay Compensation whenever the data phase timing
parameters allow it.
Fixes: #70447
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove broken support for Transmitter Delay Compensation from the Bosch
M_CAN backend driver.
Even if this was enabled via Kconfig, the TDC bit in the DBTP register set
during driver initialization is overwritten in can_mcan_set_timing_data(),
turning TDC off.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
The VLAN packets are prepared in Ethernet L2 so no need to have
special handling in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Virtual LAN logic is now done in Ethernet L2 so no need to manipulate
VLAN packets in the driver.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
