This commit makes the contents of the stm32_exti_line_t data type opaque to
the EXTI GPIO interrupt controller API users. The GPIO driver is updated
to comply with this API change.
N.B.: while some assertions are removed as part of this commit, they were
broken since forever anyways, so nothing of value is lost.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Move the functions that interact with EXTI configuration registers to
select or get the GPIO port that triggers events on a given EXTI line
to the EXTI driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Modify all functions in the GPIO driver that interact with the EXTI
so that names, signatures and comments match what they do better.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Use the `gpio_pin_t` type for all variables that hold a pin number (0..15).
Change all `int` to `uint32_t` instead, as signedness is unwanted.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
This commit reorders the functions in the EXTI driver.
Internal functions and exported functions are now grouped with each other.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
This commit changes the EXTI driver API to use unsigned types
for all parameters previously typed as `int`, as the signedness
is unneeded and unwanted.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
All assertions performed in the EXTI drivers were wrong, as they passed
values to __ASSERT_NO_MSG instead of predicates. Update all assertions
to be actually useful.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
The EXTI driver API defined in exti_stm32.h is reserved for exclusive usage
by the STM32 GPIO driver, which doesn't use this macro. Since there is no
usecase for it anyways, it can be removed for future-proofing.
The STM32 UART driver is an unintended user of this definition, however.
Replace it with a private #define which is more appropriate anyways.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
apollo3 driver added PM to UART for only apollo3
but defined PM function for both causing an error
in twister
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Automatically handle device runtime PM for all flash API calls.
Asynchronously release the device after a small delay to minimise power
state transitions under multiple sequential API calls (e.g. NVS).
Signed-off-by: Jordan Yates <jordan@embeint.com>
Remove `SPI_NOR_IDLE_IN_DPD` to simplify the possible transition states
in the `spi_nor` driver. This option was originally added 5 years ago
when device runtime PM was in a much less mature state.
I do not believe having a separate power management implementation for
this one in-tree driver is in the interests of the project.
The behaviour of `SPI_NOR_IDLE_IN_DPD` leads to extremly suboptimal
behaviour in use cases where multiple small reads are performed
sequentially, see #69588.
Removal of this option does not break the behaviour of any existing
applications, only increases current consumption in idle by ~10uA until
device runtime PM is enabled.
Signed-off-by: Jordan Yates <jordan@embeint.com>
A 16-bit value built using byte shifts and ORs from a given
couple of lsb and msb bytes will result to be the same on both
little-endian and big-endian architectures, e.g.
uint8_t lsb, msb;
int16_t val;
/* val is the same number on both le and be archs, but has
different layout in memory */
val = (msb << 8) | lsb;
All the xyz_raw_get() APIs of stmemsc sensor module build the sensor
data using the above method and DO NOT hence require (it actually leads
to wrong values on big-endian machines) to use any le/be swap routines,
such as sys_le16_to_cpu().
Fix#75758
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Updated the counter_mcux_lptmr driver to support multiple
instances of the lptmr peripheral. Also added a new
binding property to identify if the user is using
counter-mode or pulse mode. since we were previously using the
prescaler value to check this which could be wrong
if used as a division value for getting the freq.
Added a property that allows the user to decide
what the counter value in lptmr should be divided by.
Cleaned up INIT macro for lptmr.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
The reset function uses uint32_t as its 2nd parameter, which leads to the
following compiler warning.
zephyr/drivers/mipi_dbi/mipi_dbi_stm32_fmc.c:176:18: warning:
initialization of 'int (*)(const struct device *, k_timeout_t)' from
incompatible pointer type 'int (*)(const struct device *, uint32_t)'
{aka 'int (*)(const struct device *, unsigned int)'}
[-Wincompatible-pointer-types]
176 | .reset = mipi_dbi_stm32_fmc_reset,
| ^~~~~~~~~~~~~~~~~~~~~~~~
When you look at similar drivers,
/drivers/mipi_dbi/mipi_dbi_smartbond.c#L126
/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c#L561
you notice they use k_timeout_t.
So the whole fix is to correct the type.
Signed-off-by: Thorsten Spätling <thorsten.spaetling@vierling.de>
Remove the early max packet size check on endpoint activation, because
there are valid use cases where the max packet size is not multiple of 4
and the stack won't perform multi-transaction transfers. Example use
case is UAC2 explicit feedback endpoint that has Max Packet Size equal
3 when device is operating at Full-Speed.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Fail TxFIFO write if the endpoint is not activated, because there is
essentially no fifo assigned. Writing to not activated endpoint is
possible, but it does tend to corrupt fifo number 0 which is used for
control transfers. USB stack should not really be attempting to write to
endpoints that have not been activated (ep_enable called).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Store SOF frame number and use the information to set the Even/Odd
microframe bit when enabling isochronous endpoints. Reject received
isochronous data if number of packets received does not align with
received PID.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
RxFLvl interrupt should only handle the actual data movement from RxFIFO
to the buffer. OUT transfers are completed in XferCompl handler both in
DMA and Completer mode. This reduces code size by avoiding having
separate code paths based on operating mode.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Function dwc2_set_dedicated_fifo() calls dwc2_flush_tx_fifo() before the
diepctl register is written. The register will be only written after the
dwc2_set_dedicated_fifo() finishes. Solve the problem by passing fifo
number directly instead of endpoint address to dwc2_flush_tx_fifo().
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Add all register bit defines necessary for isochronous transfers. Clean
up the endpoint transfer size register defines clearly separating IN and
OUT registers because they do use different bit fields. Add alternate
bit names for bits that do have different meaning based on configured
endpoint transfer type.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Reset delay was not being calculated correctly in lcdic driver, the
ticks field needs to be accessed directly within the timeout structure
to calculate the correct delay time
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The driver in tree is for u-blox M8 devices, not M10. The M10 series
devices (from Protocol Version 23.01) use a different, non backwards
compatible interface for configuring the modem behaviour.
Of the two boards tested in the original PR, the "VMU RT1170" is
explicitly listed as having a u-blox NEO-M8N modem, while I have
been unable to find any information online about the "FMURT6" board.
Leaving the naming as-is will cause problems when M10 drivers are
contributed.
Signed-off-by: Jordan Yates <jordan@embeint.com>
- Removed zero initialization of `pincfg` structure as all members
are guaranteed to be set.
- Introduced `pfs_cfg` as an intermediate variable to store data in
the CPU register instead of stack.
- Simplified pin setting logic by relying on `pfs_cfg` being
zero-initialized, eliminating the need for explicit bit clearing.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add power management support to various drivers:
- gpio-kbd-matrix
- ite,it8xxx2-kbd
- nuvoton,npcx-kbd
- microchip,xec-kbd
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add power management support to the keyboard matrix library. This
provides a generic pm_action function that changes the keyboard matrix
scan in two places when suspended:
- reset the state to 0 for all columns
- do not enable key press detection
This ensures that any key that was pressed when the device is suspended
is released, and no other scan happens until the device is resumed.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This is just the driver for banks 0 to 3. Bank 4 will come via a
separate commit since it needs a different driver.
Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net>
This serves two main purposes:
- change the CPU clock via devicetree nodes
- provide the APB frequency to device drivers via the clock driver
interface
Theoretically this could also support choosing between the available
clock sources, but right now we only support LPOSC0 going into PLL0,
going into AHB.
Turning the PLL back off is also not supported since the only current
use case is to set the PLL frequency, turn it on, and switch the AHB
over to it.
Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net>
Can be used only once the SiM3U SoC support has been added.
Developed-by: Michael Zimmermann
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
For applications that rely on low noise/variance in accelerometer
sample reading. Application can take advantage of integrated LPF
Thus this PR adds LPF configuration capability to the mc3419 driver
Signed-off-by: Anuj Pathak <anuj@croxel.com>
Reuse the file clock_stm32g0.c for the STM32U0 and
rename it to clock_stm32g0_u0.c
because the G0 and U0 series share the same clock control.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
SOF is designed with the idea that the data transfer
between the host memory and local memory is performed via
DMA. This is not true for imx platform in which the DSP
performs this operation.
Because of the aforementioned design, SOF performs a
cache invalidation operation on the destination memory
region before data is copied further down the pipeline.
For some imx platforms, the destination memory region is
cacheable. As such, some of the data transferred from the
host memory region is held entirely in cache, which means
the RAM and the cache have different data for the same
memory region.
In such cases, performing cache invalidation forces
the DSP to fetch data from RAM instead of the cache, which
means the DSP will read stale data and propagate it further
down the pipeline.
Although not optimal and mostly as a workaround to this issue,
perform a cache WB operation on the destination memory region
to make sure that the cache and the RAM hold the same data.
During the data read operation (to copy it further down the
pipeline) after the aforemention cache invalidation, the DSP
will no longer end up reading stale data.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
When CONFIG_RISCV_VECTORED_MODE is disabled, CLIC claims interrupts using
CSR 'mnxti' and handles all pending interrupts before exiting the ISR.
When CONFIG_RISCV_VECTORED_MODE is enabled, all interrupts use vector mode
and are claimed automatically. The RISC-V common ISR is used for interrupts
hooked into SW ISR table, but it only handle one pending interrupt per ISR.
This commit enhances CLIC to set vector mode for direct ISRs only and use
the CLIC common entry for regular ISRs to handles multiple pending
interrupts in an ISR.
Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
Introduce riscv_clic_irq_vector_set() to implement z_riscv_irq_vector_set()
for CLIC. This commit also introduces CONFIG_CLIC_SMCLICSHV_EXT to indicate
support for the smclicshv extenion and riscv_clic_irq_vector_set().
Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
Most of BT_FOO symbols that are designed to select the hci driver
implementation which will drive the comunication with controller are
selected based on device tree compatible and should not be made available
as an configurable option to the user.
To do this, remove the prompt on these symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
