The UART_xyz_ENHANCED_POLL_OUT Kconfig was using an outdated property
for checking whether the peripheral has the endtx->stoptx short. The
property is now updated.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Fast PWM120 instance works with 320MHz clock, thus
pwm_nrfx_get_cycles_per_sec needs to be adjusted,
applying correct clock frequency.
Also, it uses cachable RAM, thus sys_cache function
needs to be added to flush the cached sequence.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Enable the early WakeUp Interrupt at init, once the WWDG instance
is correclty cloked. Else deadlock can occur.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove NRF_WIFI_RPU_RECOVERY_PROPAGATION_DELAY_MS Kconfig
which was defined twice with different values.
Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
Similar to `stm32_ltdc_display_blanking_off()`, use local device variable
instead of accessing the config's structure member again.
Signed-off-by: Haiyue Wang <haiyuewa@163.com>
Allow configuring the clock prescaler divider for the NXP Kinetis
Timer/PWM Module (TPM). Setting the prescaler to a lower value
allows for higher resolution for the generated PWM waveforms.
This change is inspired from the pwm_mcux_ftm driver:
Link: https://github.com/zephyrproject-rtos/zephyr/pull/25396
Signed-off-by: Maximilian Werner <maximilian.werner96@gmail.com>
Enumerate explicitly on which SoC's DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT
should be set by default. For new platforms in the ACE series, the
default should be disabled.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Endpoint disable function is racing against bus traffic. If the bus
traffic leads to transfer completion immediately before the endpoint
disable is executed, then the transfer complete interrupt will remain
set when the endpoint is disabled. For OUT endpoints this leads to "No
buffer for ep" errors, while for IN endpoint this can lead to double
buffer pull which causes assertion failure.
The proper solution would be to change endpoint disable to not actually
wait for the individual events (and accept that the endpoint may not
need to be disabled because the transfer can just finish). For the time
being workaround the issue by clearing XferCompl bit on endpoint
disable.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
When handling incomplete iso IN interrupt mark current transfer as
complete and program the endpoint with any subsequently queued packet.
Program the endpoint directly in interrupt handler because the data
must be programmed before SOF (by the time incomplete iso IN interrupt
is raised there is less than 20% * 125 us = 25 us before SOF).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The NAKSts bit may be set on isochronous OUT endpoints when incomplete
ISO OUT interrupt is raised. The code would then assume that endpoint is
already disabled and would not perform the endpoint disable procedure.
This in turn was essentially halting any transmission on the isochronous
endpoint, abruptly terminating the data stream.
Fix the issue by always following full endpoint disable procedure on
isochronous endpoints.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Fix the out of bound buffer read by checking the lower-bound index
in the ov5640_enum_frmival function.
Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Or more precisely, do not remove the workaround for them.
The current HW models are accurate enough in this area for the
workaround to work properly.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Move all adc driver api structs into an iterable section, this allows us
to verify if an api pointer is located in compatible linker section.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Ambiq USB HAL do not expect endpoint transaction request when an
endpoint is stalled. This commit addresses this behavior in shim driver
by checking for endpoint's stall status when enqueue request is
received, and defer it until endpoint stall is cleared.
Signed-off-by: Chew Zeh Yang <zeon.chew@ambiq.com>
Accessing DWC2 otg core registers before the clock starts results in
complete system hang. Add a 1 us busy wait to make sure that software
won't access registers before the clock is started.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Instead of depending on SPI/GPIO. This allows to just enable
CONFIG_LORA=y + DT node in the application layer. The same
pattern is nowadays followed by most drivers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add Zephyr support for the Audio DSP on the MT8196 SOC. This is a
very similar device to previous designs. Most of this patch is just
DTS.
The biggest delta is the more complicated second level interrupt
controller, though it is still able to be represented using some
vaguely clever DTS config over the older intc_mtk_adsp driver.
Also the memory layout is slightly different, requiring a little
indirection to set the initial boot stack address and log output
buffer. And the timer "irq_ack" register bits moved.
Signed-off-by: Andy Ross <andyross@google.com>
HD44780 controller can indicate via busy flag whether it's finished
processing current command. This allows for faster completion of HD44780
commands as seen from MCU perspective, as the MCU doesn't have to wait
for fixed long period of time. Implement this functionality.
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
If proper power supply is used to power the hd44780, it initializes
correctly on a reset condition all by itself. However,
if the power supply is below its expectations (e.g. some 3.3V Nucleo
board), it won't initialize properly on its own, and the MCU
has to carry out the initialization as listed in the reference manual.
Since we cannot determine it properly in the runtime,
always carry out the initialization procedure.
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
In order for the driver to be compliant with the timing sequence
diagrams presented in the reference manual, the MCU has to wait
for some additional period of time while setting both the rs and rw
lines.
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
Express delay values in nanoseconds. Set the default delay time values
as specified in the HD44780 reference manual.
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
There's no need to set this line every single time a command is sent
to the HD44780. Set it only once, so that one can save some cpu cycles.
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
Separate the current driver for the FPGA iCE40 into two different ones.
One implements only the SPI load mode, the other one only the GPIO
bitbang mode.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
