As a step to make them common code: spi_rtio.c.
Verified this refactorization builds and passes spi_loopback, both with
CONFIG_SPI_RTIO enabled, as well as disabled. Tested on mimxrt1010_evk.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
This change will allow users to configure the Ethernet RX thread
according to their specific real-time requirements.
Adding preemptive threading helps to reduce jitter and
the impact of Ethernet traffic on real-time performance.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
remove check for system clock frequency in clock_stm32_ll_h7 because of
addition of fracn (difficult to handle)
Signed-off-by: Nathan Olff <nathan@kickmaker.net>
Commit 47187a9ec9 made the `pinctrl` property
of STM32 ADCs optional, to allow usage of internal channels without wasting
GPIO pins. However, the driver was not adapted to support this new usecase.
(The real bug comes from commit 93956b2073,
that transitioned from a custom `stm32_dt_pinctrl_configure` function to
the standard `pinctrl_apply_state`, without accounting for the fact that
the former returns 0 when pinctrl is empty, but the latter returns -ENOENT)
Modify the driver to work even if no `pinctrl` is present on the ADC node.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Refactors the cmake and kconfig bits of the tdk sensor drivers into the
vendor subdirectory to make them consistent with other vendor-sorted
sensor drivers. The tdk driver implementations were previously moved
into the vendor subdirectory in commit
41f1c3a2b7.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Allow IRQs to work on every hart regardless of the mapping
of the contexts.
Add a test to validate the hart-context mapping.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Do not schedule isochronous data on current frame. While doing so can
work at Full-Speed, it is pretty much impossible to do it quickly enough
at High-Speed.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Move the lock out from the `plic_irq_enable_set_state()` function
to cover the entire configuration process, so the whole of
enable/disable is atomic.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Fixing a bug where during the bus_init routine, when a slave is
initialized, the target hardware can get an interrupt, and this can occur
before the target_config structure is assigned; the generic IRQ handler
attempts to use this structure to grab callback function pointers, but
with no target config it attempts to access the structure member from a
null pointer. Fix works by adding ternary operation during IRQ that first
checks if target_config is null or not.
Signed-off-by: Matthew Mulloy Steinborn <mulloystmatthew@meta.com>
TMP variant without combine channel feature is used in some NXP SoCs.
Build error occurs for such socs because of accessing unavailable
struct member in hal.
Fix it by adding #if directive to check the feature presence.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Before unmapping a memory page, the cache is flushed. If the given memory
page is not mapped, this operation ends with a cpu exception on the
ptl platform. Add check if tlb translation is active before flushing.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The existing hwinfo driver for STM32 is incompatible with STM32WB0 series.
Prevent compiling the driver if the target's series is STM32WB0.
This fixes the build failure on the drivers.hwinfo.api test.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Adds a basic driver for the STM32WB0 flash controller (read/erase/write).
Extended operations are not supported by this driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Adds a driver for the STM32WB0 series GPIO interrupt controller.
This driver implements the STM32 GPIO INTC API, along with an extension
function used to check if a specific line is available on current board.
This also extends the GPIO INTC API to support level-sensitive interrupts,
as this feature is available on STM32WB0.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Common counter driver based on timer for MAX32xxx MCUs
To use as wakeup source wakeup-source parameter shall be
defined as below
&lptimer0 {
status = "okay";
clock-source = <ADI_MAX32_PRPH_CLK_SRC_ERTCO>;
wakeup-source;
counter {
status = "okay";
};
};
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
There is a regression caused by #76177, which
causes build to fail due to missing includes and others.
This wraps it with proper checks and fixes wifi scan call.
This also remove unused variable present in the same driver.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
- enabled combined interrupt configuration for stm32u0x serie.
- since stm32u0 serie doesn't support SMBUS we need to avoid
use SMBHEN and SMBDEN bits register.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
There are numbers of drivers for different PCA(L) series chip. They
share similiar register layout and control logic. This driver intends
to unify these drivers for PCA(L)xxxx series i2c gpio expanders.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Implement an option manual reset of the PCAL64XXA to allow the external
implementation of a retention of the port expander state.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Extract method which applies the initial state in the driver
for the port expander PCAL64XXA.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
On some i.MX SoCs, such as i.MX95, the System Manager is running on a
Cortex-M core to manage the hardware resources and provide services for
SCMI requests.
So add the SCMI-based pinctrl driver to support these i.MX SoCs.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The MU init should be very early for some platforms. For examples,
i.MX95 is using MU for ARM SCMI. It should be initialzied early
for next power, pinctrl, clock etc. management.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
GRTC needs to use direct clock source path instead of system clock path
to support ELV mode for nRF54L targets.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Add support the ccc deftgts. This also includes a function to check if
there is a secondary controller on the bus, and will transmit deftgts
after initialization or a hotjoin event.
This also adds dynamic_addr to the config_target in order to retrieve
the currently configured dynamic address to be used with deftgts.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Adds a new DTS prop for i3c devices as support for the CCC SETAASA
requires prior knowledge of the target if it supports it according
to i3c spec v1.1.1 section 5.19.3.23.
This will be used as an optimization for bus initialization.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
