drivers: dai/dmic: Add support for ace30 (PTL)
Add dmic support in PTL. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com> Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
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2 changed files with 9 additions and 9 deletions
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@ -159,7 +159,7 @@ static inline void dai_dmic_release_ownership(const struct dai_intel_dmic *dmic)
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static inline uint32_t dai_dmic_base(const struct dai_intel_dmic *dmic)
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{
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#ifdef CONFIG_SOC_INTEL_ACE20_LNL
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#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30_PTL)
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return dmic->hdamldmic_base;
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#else
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return dmic->shim_base;
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@ -172,7 +172,7 @@ static inline void dai_dmic_set_sync_period(uint32_t period, const struct dai_in
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uint32_t val = CONFIG_DAI_DMIC_HW_IOCLK / period - 1;
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uint32_t base = dai_dmic_base(dmic);
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/* DMIC Change sync period */
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#ifdef CONFIG_SOC_INTEL_ACE20_LNL
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#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30_PTL)
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sys_write32(sys_read32(base + DMICSYNC_OFFSET) | FIELD_PREP(DMICSYNC_SYNCPRD, val),
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base + DMICSYNC_OFFSET);
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sys_write32(sys_read32(base + DMICSYNC_OFFSET) | DMICSYNC_SYNCPU,
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@ -286,7 +286,7 @@ static void dai_dmic_irq_handler(const void *data)
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static inline void dai_dmic_dis_clk_gating(const struct dai_intel_dmic *dmic)
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{
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/* Disable DMIC clock gating */
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#ifdef CONFIG_SOC_INTEL_ACE20_LNL /* Ace 2.0 */
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#if (CONFIG_SOC_INTEL_ACE20_LNL || CONFIG_SOC_INTEL_ACE30_PTL)
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sys_write32((sys_read32(dmic->vshim_base + DMICLVSCTL_OFFSET) | DMICLVSCTL_DCGD),
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dmic->vshim_base + DMICLVSCTL_OFFSET);
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#else
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@ -298,10 +298,10 @@ static inline void dai_dmic_dis_clk_gating(const struct dai_intel_dmic *dmic)
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static inline void dai_dmic_en_clk_gating(const struct dai_intel_dmic *dmic)
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{
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/* Enable DMIC clock gating */
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#ifdef CONFIG_SOC_INTEL_ACE20_LNL /* Ace 2.0 */
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#if (CONFIG_SOC_INTEL_ACE20_LNL || CONFIG_SOC_INTEL_ACE30_PTL)
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sys_write32((sys_read32(dmic->vshim_base + DMICLVSCTL_OFFSET) & ~DMICLVSCTL_DCGD),
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dmic->vshim_base + DMICLVSCTL_OFFSET);
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#else
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#else /* All other CAVS and ACE platforms */
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sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) & ~DMICLCTL_DCGD),
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dmic->shim_base + DMICLCTL_OFFSET);
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#endif
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@ -312,7 +312,7 @@ static inline void dai_dmic_program_channel_map(const struct dai_intel_dmic *dmi
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const struct dai_config *cfg,
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uint32_t index)
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{
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#ifdef CONFIG_SOC_INTEL_ACE20_LNL
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#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30_PTL)
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uint16_t pcmsycm = cfg->link_config;
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uint32_t reg_add = dmic->shim_base + DMICXPCMSyCM_OFFSET + 0x0004*index;
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@ -321,7 +321,7 @@ static inline void dai_dmic_program_channel_map(const struct dai_intel_dmic *dmi
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ARG_UNUSED(dmic);
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ARG_UNUSED(cfg);
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ARG_UNUSED(index);
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#endif /* defined(CONFIG_SOC_INTEL_ACE20_LNL) */
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#endif /* defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30_PTL) */
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}
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static inline void dai_dmic_en_power(const struct dai_intel_dmic *dmic)
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@ -331,7 +331,7 @@ static inline void dai_dmic_en_power(const struct dai_intel_dmic *dmic)
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sys_write32((sys_read32(base + DMICLCTL_OFFSET) | DMICLCTL_SPA),
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base + DMICLCTL_OFFSET);
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#ifdef CONFIG_SOC_INTEL_ACE20_LNL /* Ace 2.0 */
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#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30_PTL)
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while (!(sys_read32(base + DMICLCTL_OFFSET) & DMICLCTL_CPA)) {
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k_sleep(K_USEC(100));
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}
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@ -173,7 +173,7 @@ struct dai_intel_dmic {
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/* hardware parameters */
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uint32_t reg_base;
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uint32_t shim_base;
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#ifdef CONFIG_SOC_INTEL_ACE20_LNL
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#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30_PTL)
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uint32_t hdamldmic_base;
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uint32_t vshim_base;
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#endif
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