Commit graph

1,992 commits

Author SHA1 Message Date
Ioannis Glaropoulos
cfa2fb278f drivers: serial: mcux: enforce an error-free header inclusion
We need to change the order of inclusions in
uart_mcux_lpuart.c, to avoid build errors. This
is required since the driver structures contain
a field named DATA, which is also a macro defined
in the linker script.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-24 21:53:49 -04:00
Mieszko Mierunski
cacb529206 drivers: nrf: Add 2 stop bits option to nrf UARTE and UART driver
nrf52840 and nrf9160 have possible configuration of two stop bits
for UART and  UARTE, this commit adds handling of it to driver.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2019-09-24 15:23:33 +02:00
Ioannis Glaropoulos
95c2968d32 soc: arm: nxp: cleanup in soc.h headers
A commit that organizes the soc.h header of NXP SoCs:
- removing redundant inclusions of sys/util.h
- removing inclusions of device.h and kernel_includes.h
- including the auto-generated DTS board header
- including the fsl_common.h header
- fixing minor style issues

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-23 18:02:00 -07:00
Anas Nashif
08b43fc9ef drivers: uart: remove qmsi UART driver
No users of this driver after dropping quark platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-18 11:06:18 -05:00
Jan Van Winkel
7e5c65d521 uart: native_posix: Moved declaration of native_uart_status
Move declaration of struct native_uart_status before definition of
a variable of its type

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-09-17 11:27:19 +02:00
Kumar Gala
8a50048b2b kconfig: serial: sam0: Convert to use new kconfigfunctions
Convert use of dt_int_val to dt_compat_enabled.  As we want to
remove dt_int_val.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-13 11:42:34 -05:00
Andy Ross
643701aaf8 kernel: syscalls: Whitespace fixups
The semi-automated API changes weren't checkpatch aware.  Fix up
whitespace warnings that snuck into the previous patches.  Really this
should be squashed, but that's somewhat difficult given the structure
of the series.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-09-12 11:31:50 +08:00
Andy Ross
346cce31d8 kernel: Port remaining buildable syscalls to new API
These calls are buildable on common sanitycheck platforms, but are not
invoked at runtime in any tests accessible to CI.  The changes are
mostly mechanical, so the risk is low, but this commit is separated
from the main API change to allow for more careful review.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-09-12 11:31:50 +08:00
Filip Brozovic
e464e98067 drivers: serial: Add instance 4 to mcux lpuart shim driver
Adds instance 4 to the mcux lpuart shim driver.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-09-11 09:23:28 -05:00
Mohamed ElShahawi
bcd9e49f3f drivers: esp32: UART - use dts config for HW flow Control
- dts updated for UART1/2
- Additional check added to _INIT macro to configure flow control mode
- Additional check added to _INIT macro to set CTS/RTS gpios values
- Additional check added for gpio config

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-09-11 07:50:20 -05:00
Mohamed ElShahawi
0705be344c drivers: esp32: UART Fix yaml/dts binding name
replace "xtensa" with "espressif", as the latter is the correct
vendor name.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-09-11 07:50:20 -05:00
Mohamed ElShahawi
2d035c4191 drivers: esp32: Add UART Driver with FIFO/Interrupt support
- Fixes #3981
- Implement UART Polling functions
- Implement UART Interrupt APIs
- Remove dependency on esp32_rom_uart_xxx functions
- Update Device tree with UART addresses and pin config
- Update ESP32 UART KConfig

Notes about implementation:
- Interrupts now defined as a local macros, and should be removed
later on, when interrupts for esp32 are supported in dts

- Threshold interrupts are used for TX/RX
- Reseting FIFOs using _RST bit will corrupt FIFO of UART2 when used for
UART1 and vice-versa, so a generic way is used for all three UARTs

- Old Silicon rev is not supported

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-09-11 07:50:20 -05:00
Kumar Gala
95f78bcacf interrupt: Convert RISC-V plic to use multi-level irq support
Utilize the multi-level irq infrastructure and replace custom handling
for PLIC on riscv-privilege SoCs.  The old code offset IRQs in drivers
and various places with RISCV_MAX_GENERIC_IRQ.  Instead utilize Zephyr's
encoded IRQ and replace offsets in drivers with the IRQ define from DTS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-10 07:34:57 -05:00
Mieszko Mierunski
6a6ed174b7 drivers: uart: Properly configure pins in NRF UARTE power management
Configure pins before enabling and after disabling UARTE through
power management functions.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2019-08-28 14:04:18 +02:00
Mieszko Mierunski
f2bd628c5a drivers: nrf: Fix RX timeout and ENDRX ISR handling.
Ensure that two routines won't interfere with eachother.
In current situation there is possibility that ENDRX will be called
during rx_timeout routine or vice-versa which will result in wrong
offset and length passed to user.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2019-08-26 16:21:25 +02:00
Mieszko Mierunski
4a13041c38 drivers: uart: Fix incorrect len and offset in nrf UARTE async API.
Due to longer than expected user callback handling, rx byte counting
got out of sync with real values. It leads to incorrect values
reported to user. This fix adds sync point at the end of buffer.

When using hardware rx counting this issue should not occur.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2019-08-26 16:21:25 +02:00
Wayne Ren
4fb8bf61c0 drivers: ns16550: add WORD only access support
In some hardware,e.g. ARC HS Development kit,the
peripheral space of ns16550 only allowes WORD
access,  byte acess will raise bus error.

This commit adds support for this case

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 20:11:29 +02:00
Wendy Liang
5364a389e5 serial: Add Xilinx ZynqMP PS uart driver
Add ZynqMP PS uart driver for Xilinx ZynqMP platform

Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
2019-08-09 22:50:50 +02:00
Nicolas Pitre
75bf3c5368 riscv: freedom: rename RISCV32 to RISCV
This code is common to 32- and 64-bit builds.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-08 00:29:24 -04:00
Nicolas Pitre
e5981f2b71 drivers: sifiv: make them 64-bit compatible
Make those drivers compatible with a 64-bit build.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-08 00:29:24 -04:00
Pavel Kral
b7db90da43 drivers: serial: uart_rtt: Virtual UARTs over RTT channels
Add support for virtual UART device that uses Segger RTT channels
for data transfers. Due to the RTT principle, this driver supports
only polling API.

Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
2019-07-31 17:23:57 +02:00
Kumar Gala
4e7863dc41 dts: Make instance defines consistent
We generated a define for each instance to convey its existance of the
form:
	#define DT_<COMPAT>_<INSTANCE> 1

However we renamed all other instance defines to be of the form
DT_INST_<INSTANCE>_<FOO>.  To make things consistent we now generate a
define of the form:

	#define DT_INST_<INSTANCE>_<COMPAT> 1

We also now deprecate the DT_<COMPAT>_<INSTANCE> form and fixup all uses
to use the new form.

Fixes: #17650

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-30 17:10:31 -05:00
Piotr Zięcik
08f8abcfe4 drivers: uart_cc13xx_cc26xx: Get clock frequency from DTS
The uart_cc13xx_cc26xx driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Piotr Zięcik
9e9f5cecff drivers: uart_stellaris: Get clock frequency from DTS
The uart_stellaris driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Piotr Zięcik
dc44cb00d1 drivers: uart_qmsi: Get clock frequency from DTS
The uart_qmsi driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Piotr Zięcik
69bbcec74f drivers: uart_msp432p4xx: Get clock frequency from DTS
The uart_msp432p4xx driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Piotr Zięcik
170e93bb17 drivers: uart_cc32xx: Get clock frequency from DTS
The uart_cc32xx driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Piotr Zięcik
60314555ef drivers: uart_pl011: Get clock frequency from DTS
The uart_pl011 driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Piotr Zięcik
e858805742 drivers: uart_cmsdk_apb: Get clock frequency from DTS
The uart_cmsdk_apb driver used system clock frequency
as a base for baudrate calculation. This commit corrects
that by obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Erwan Gouriou
fda2ea7253 drivers/serial: stm32: Add support for STM32H7 series
Add needful to enable uart on STM32H7.
This mostly impact dts but as well soc for fixup.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou
8c6070d89b drivers: stm32: Fix leading space warnings
In two stm32 drivers, fix leading spaces warning.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Anas Nashif
a2fd7d70ec cleanup: include/: move misc/util.h to sys/util.h
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
5eb90ec169 cleanup: include/: move misc/__assert.h to sys/__assert.h
move misc/__assert.h to sys/__assert.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
d1b2718687 cleanup: include/: move uart.h to drivers/uart.h
move uart.h to drivers/uart.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
46a5d1e5cb cleanup: include/: move dma.h to drivers/dma.h
move dma.h to drivers/dma.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
17ddd1714c cleanup: include/: move clock_control.h to drivers/clock_control.h
move clock_control.h to drivers/clock_control.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
ef281c4237 cleanup: include/: move sys_io.h to sys/sys_io.h
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
190e368275 cleanup: include/: move power.h to power/power.h
move power.h to power/power.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
cdc78108d5 drivers: serial: ns16550: move header from /include/
Move ns16550 to the driver directory. No other users in the tree and it
is a private header.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-25 15:27:00 -04:00
Anas Nashif
43a49335f4 include: move interrupt controller headers to interrupt_controller/
Move internal and architecture specific headers from include/drivers to
subfolder for interrupt_controller:

include/drivers/interrupt_controller/

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-25 15:27:00 -04:00
Charles E. Youse
3dc7c7a6ea drivers/interrupt_controller/mvic.c: remove MVIC interrupt controller
The Quark D2000 is the only x86 with an MVIC, and since support for
it has been dropped, the interrupt controller is orphaned. Removed.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Charles E. Youse
57b46bbc85 soc/x86/intel_quark: remove support for Quark D2000 SoC
Removed Quark D2000 SoC files and first-order related DT bindings.

A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Kumar Gala
f20d2b6f41 drivers: rv32m1: remove bogus IRQ_PRI related defines
The defines related to IRQ priority don't exist and aren't used.  So
just pass 0 to IRQ_CONNECT for the priority field.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-24 07:22:27 -04:00
Andrei Gansari
58e05ddcc1 drivers: uart for LPC devices interrupt enabled
NXP's MCU LPC families uart interrupt was enabled.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-06-21 11:24:09 -05:00
Kumar Gala
dba65ce47c drivers: Update DT IRQ alias defines
The defines should have had a _0 on them, now that we generate the
proper defines, fixup the cases that used that old scheme.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 07:53:05 -05:00
Anas Nashif
f2cb20c772 docs: fix misspelling across the tree
Found a few annoying typos and figured I better run script and
fix anything it can find, here are the results...

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-19 15:34:13 -05:00
Kumar Gala
dca8a62afa drivers/uart_rv32m1_lpuart: Fix DT define usage
The driver was using a mix of instance defines and alias, move to just
using the alias defines so its consistent.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-15 07:14:12 -04:00
Kumar Gala
d4a0c3a2aa dts: Convert new/missed DT_<COMPAT>_<INSTANCE>_<PROP> to DT_INST...
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-15 07:14:12 -04:00
Kumar Gala
a2693975d7 dts: Convert from DT_<COMPAT>_<INSTANCE>_<PROP> to DT_INST...
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-14 08:02:15 -05:00
Anas Nashif
4c32258606 style: add braces around if/while statements
Per guidelines, all statements should have braces around them. We do not
have a CI check for this, so a few went in unnoticed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-06 15:20:21 +02:00