driver: uart_ns16550.c: necessary changes for arc iot soc

1. optimize the baudrate calulation
2. For arc iot soc, the interval val is 4
3. before write any regs, the clk of uart must be enabled

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This commit is contained in:
Wayne Ren 2018-11-18 02:21:09 +08:00 committed by Anas Nashif
commit f0db0b8815

View file

@ -193,7 +193,11 @@
#ifdef UART_NS16550_ACCESS_IOPORT
#define INBYTE(x) sys_in8(x)
#define OUTBYTE(x, d) sys_out8(d, x)
#define UART_REG_ADDR_INTERVAL 1 /* address diff of adjacent regs. */
#ifdef CONFIG_SOC_ARC_IOT
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
#else
#define UART_REG_ADDR_INTERVAL 1
#endif
#else
#define INBYTE(x) sys_read8(x)
#define OUTBYTE(x, d) sys_write8(d, x)
@ -251,7 +255,7 @@ static void set_baud_rate(struct device *dev, u32_t baud_rate)
if ((baud_rate != 0) && (dev_cfg->sys_clk_freq != 0)) {
/* calculate baud rate divisor */
divisor = (dev_cfg->sys_clk_freq / baud_rate) >> 4;
divisor = ((dev_cfg->sys_clk_freq / baud_rate) >> 4) + 1;
/* set the DLAB to access the baud rate divisor registers */
lcr_cache = INBYTE(LCR(dev));
@ -323,6 +327,11 @@ static int uart_ns16550_init(struct device *dev)
old_level = irq_lock();
#ifdef CONFIG_SOC_ARC_IOT
/* enbale clk for uart before write any regs */
OUTBYTE(DLF(dev), 1);
#endif
set_baud_rate(dev, dev_data->baud_rate);
#ifdef CONFIG_UART_NS16550_DLF