When slave_address is 10 bits, data type should be
uint16_t instead of uint8_t,
like the data typeof data->slave_cfg->address.
https://github.com/zephyrproject-rtos/zephyr/issues/55987
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The i2c_ll_stm32_v2 driver requires manual timing configuration for
"fast mode plus" speed.
This adds an error message linking to the appropriate documentation.
Signed-off-by: Jonas Otto <jonas@jonasotto.com>
Enabled intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS I2C to transfer and
receive data.
Signed-off-by: Bindu S <bindu.s@intel.com>
Remove unwanted "pm_device_runtime_get" lock which makes i2c power
management working incorrectly.
Fixes: #62790
Signed-off-by: Petr Hlineny <development@hlineny.cz>
Drivers for nRF SoCs using pinctrl did not select PINCTRL. This means
boards are forced to enable PINCTRL.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Reset the device on initializing if reset-node is available in dts.
`snps,desingware-i2c` does not define reset-node itself.
Add more of an element that inherits `reset-device.yaml` to
the `compatible` section to allow defining the reset-node
for using this feature.
For example.
```
compatible = "reset-device-inherit-node", "snps,designware-i2c";
```
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Introduce I2C target transfer using the PIO mode. Add an option
"target-pio-mode" in the yaml file, determined by the DTS, to dictate
whether I2C target transfer uses the PIO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Disable the timeout setting when both the clock and data are
in a low state. This allows for I2C host clock stretching
without a timeout limit.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
IT8XXX2_I2C_STR is a register of read-only, non-writable to clear.
Here we can set hardware reset bit in the IT8XXX2_I2C_CTR register
to clear the status of IT8XXX2_I2C_STR.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit adds option to dump i2c messages of only specified
devices. It makes it easier to debug communication of specific
i2c device instead of logging all i2c communication.
The filter of devices is specifiec in device-tree using the
node with "zephyr,i2c-dump-filter" compatible string.
Example of device-tree node:
i2c-dump-filter {
compatible = "zephyr,i2c-dump-filter";
devices = < &display0 >, < &sensor3 >;
};
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit changes the format of printed messages to align the
following strings and make it more readable.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit changes the parameter of i2c_dump_msgs function from
string name to pointer to the device structure.
It allows for comparison of device pointers and allow to use
the printed device name in i2c shell commands.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
To be consistent with other xmc4xxx drivers.
A few other device tree changes:
- Rename clock signal option as it's handled by DX1.
- Remove clock-frequency option as it's already added in
i2c-controller.yaml, and interrupts is already defined as array
in base.yaml.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Currently the driver is not configured as controller during initialization.
Any use of I2C in controller mode without an explicit i2c_configure() will
not work.
In this commit the driver is automatically configured.
But, delay the configuraition until first use instead of during init
because otherwise tests/drivers/i2c/i2c_target_api hangs without any
errors on xmc47_relax_kit (when internal pulls are used). This issue
needs to be investigated.
There are a few other fixes/cleanups:
- Change the default master_frequency from XMC4_I2C_SPEED_STANDARD to
I2C_SPEED_STANDARD.
- Use devicetree clock frequency for target configuration instead of
I2C_SPEED_STANDARD.
- Rename master_frequency to bitrate as it's also used by the target
configuration now.
- Remove several uneeded casts.
- Forward backup config in get_config().
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The simple executor was removed with the usage of the spsc queue but
some stray references remained. Remove those.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds a new I2C shim driver for Intel SoCs. Builds upon the SEDI bare
metal I2C driver in the hal-intel module.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
Sometimes, channel C may write wrong register to the target device.
This issue occurs when FIFO2 is enabled on channel C. The problem
arises because FIFO2 is shared between channel B and channel C.
FIFO2 will be disabled when data access is completed, at which point
FIFO2 is set to the default configuration for channel B.
The byte counter of FIFO2 may be affected by channel B. There is a
chance that channel C may encounter wrong register being written due
to the FIFO2 byte counter wrong write after channel B's write operation.
The current workaround is that channel C cannot use FIFO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Update to shim driver compatible with the hardware block
in S32K344. Configure the pins before initializing I2C
to avoid happening bus busy.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
This commit aligns TWIM shim to utilize memory-region property.
The memory-region is not required property that enables user
to specify placement of dma buffers in memory region.
It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
There are two different i2c node properites `zephyr,flash-buf-max-size`
and `zephyr,concat-buf-size`. In the end max value of that two is used
to define size of the message buffer.
It's redundant to store both values in device config structure.
Changed config structure to contain only bigger value.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commits adds the ability to use Silicon Lab chips as an I2C
target. This could be used together with the EEPROM target
driver.
Signed-off-by: Kai Meinhard <kaimeinhard@hotmail.de>
Add a semaphore to ensure that only one transaction
happens at a time when threads want to transfer
simultaneously.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
The eSPI, I2C, and SPI emulators use devicetree macros to build an array
of devices on the virtual bus. Currently, they will add device nodes that
are not status-okay. This leads to linker errors because the respective
device drivers would not have instantiated device structs for these
nodes --assuming the driver was even compiled. This can be frustrating
if nodes need to be disabled for debugging or configuration purposes.
Update the bus emulators to only consider status-okay nodes by changing
the macros used to iterate over bus devices.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Add I2C target driver used buffer mode. The maximum accessible buffer
is 2044 bytes, the default is 256 bytes.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add the callback functions of buf_write_received and buf_read_requested
to support buffer mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
In order for TCA954X driver to work well, we know that
mux root must be initialized before channels.
(see #37786).
This commit is:
- Ensuring that this condition is met at build.
- Document needed values for menuconfig to help user.
- Edit these values for TCA954X test sample
Fixes#40833
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
- This includes the driver, test app, and sample app
- Only the boards\arm\xmc47_relax_kit board is supported for now
Signed-off-by: Bill Waters <bill.waters@infineon.com>
This patch adds driver support for Microchip's PolarFire SoC I2C. This
initial support implements the Controller API only.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
Previous commit added support of large transactions on I2C v2,
this commit implements some changes to also add support
of large transactions on I2C v1. Some refactoring is also done
to put the code in the right source files.
Fixes zephyrproject-rtos#58866
Signed-off-by: Michael Grand <m.grand@trustngo.tech>
This patch adds the ability to change virtual i2c eeprom target address
at runtime using a single function.
Added CONFIG_I2C_EEPROM_TARGET_RUNTIME_ADDR as an optional Kconfig.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The I2C driver clock was initialized in board specific code, move it to
the driver as it is part of its responsabilities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The NPCX I2C controller has a port-controller hierarchy and the driver
is split in two files, with separate device struct and init functions.
These are currently initialized at the same level and priority, so the
actual order depends on what the linker does.
To avoid relying on the linking order, add a dedicated priority option
for the port that is set to go after the normal I2C one by default.
Found this by building with CONFIG_CHECK_INIT_PRIORITIES.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add I2C target mode support for NPCX i2c driver. Verified with
i2c_target_api test suite on npcx9m6_evb.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add STM32C0 SOC to combined interrupt config in order to
make it support the I2C driver.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Logic was wrong when testing if a slave is still attached. And i2c
driver was never disabled.
Test if one of the two slave_cfg pointer is not NULL to return
immediately.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
Since the introduction of the second slave address support, slave_cfg
pointer may be NULL when entering slave event function.
It happens when both targets are registered and then the first one is
unregsitered.
Test the pointer vs NULL before using it.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
The i2c_npcx_controller does not actually implement the i2c API, that's
implemented in the port driver and the controller one is in support of
that. This means there's no need to use the I2C specific instance
define, as that would end up adding the stats structure that would never
get used.
This was originally added in 7b1349cfe6.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The i2c shell write command outputs the error "Failed to read from
device" while it tries to write data to device.
This fixes the error by outputting "Failed to write to device" instead.
Fixes:
uart:~$ i2c write i2c@3ff53000 23 01
Failed to read from device: 23
Signed-off-by: Gaël PORTAY <gael.portay@rtone.fr>
I2C driver overwrites i2c_msgs buffers, which
causes statistics to fail counting.
This creates new variables to hold msg buffer information.
Fixes#57532
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Mutexs were added to improve the overlapping phenomenon
because there is a part that shares the i2c line.
Signed-off-by: yeongnam chu <yeongnam.chu@assaabloy.com>
The emulated espi and i2c bus controllers do not depend on CONFIG_EMUL
being enabled. When these fake bus controllers are enabled by their
assoicated compatible in the devicetree without CONFIG_EMUL it results in
linker failures for underlying peripheral emulators which may be difficult
to understand. The SPI config already depends on EMUL.
Make the ESPI and I2C emulated controllers depend on CONFIG_EMUL. Note:
This still allows linker failures if CONFIG_EMUL=n, but the linker failures
will be consistently at device driver instantiation due to a missing bus
controller. Regardless, this will be easier to debug when someone forgets
to enable CONFIG_EMUL.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
This patch adds MULTITHREADING as a dependency to the nrfx i2c driver.
The driver uses semaphores internally and can result in linker errors
if MULTITHREADING is not enabled.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Updated the code to to invoke reset using PCR block
z_mchp_xec_pcr_periph_reset() instead of resetting
using I2C Configuration register
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Disable the hardware I2C target detection on the IT82xx2 SoC family.
Note: The register setting of I2C target detection is different in
IT81XX2 and IT82XX2 SOC.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The rvm32m1 platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use PRIxPTR macros to fix compiler warnings of the form:
i2c_xilinx_axi.c:266:50: warning: format specifies type 'unsigned long'
but the argument has type 'mem_addr_t' (aka 'unsigned int') [-Wformat]
LOG_INF("Configuring %s at 0x%08lx", dev->name, config->base);
~~~~~ ^~~~~~~~~~~~
%08x
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
- Add initial version of Infineon CAT1 i2c driver.
- Add initial version of binding file for Infineon
CAT1 I2C driver
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a driver to support the Xilinx AXI IIC Bus Interface logic core, as
described in Xilinx document PG090. This can be configured for use on
most Xilinx FPGA-based platforms such as the Digilent Arty.
Both the 2.00a and 2.1 versions of the core are supported. The 2.00a
revision has a bug causing dynamic read mode to not be reliable. With
this version of the core the driver falls back to reading only 1 byte
per interrupt.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Use CONFIG_I2C_INIT_PRIORITY instead of
CONFIG_KERNEL_INIT_PRIORITY_DEVICE as introduced in
c8f9f53322.
Looks like the priority was accidentally changed in
f2c42663b4.
Signed-off-by: Martin Jäger <martin@libre.solar>
This adds the i2c driver for the Renesas SmartBond(tm) MCU family.
It supports blocking transfers and callback transfers.
Currently only supports controller mode.
Co-authored-by: Stan Geitel <stan@geitel.nl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This change adds a mutex to protect against simultaneous access to the bus
instead of returning an error during transfers. Since most I2C code doesn't
handle retries (especially with a -EIO code) not blocking on a mutex can
cause a number of problems.
Signed-off-by: Corey Wharton <xodus7@cwharton.com>
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".
Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
i2c_bitbang_init takes a context as void *, so discarding const
qualifier of the driver's config. Explicitely cast to void * to fix the
problem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add I2C bus recovery support to the STM32 v1 and v2 driver. The STM32 i2c
peripheral does not natively support I2C bus recovery so recovery is
performed using GPIO bitbanging. This mirrors the bus recovery
implementation for NXP MCUX LPI2C driver.
Fixes: zephyrproject-rtos#54917
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
Since PINCTRL and pinctrl-0 is now required, there's no point in doing
extra validation at driver level. Modify the macro to just check that
sleep state is present when needed, since it was the only remaining
assertion that was not covered. Renamed the macro to make it more clear
what it does: NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create and use a new `zephyr,i2c-target-eeprom` compatible
within I2C eeprom target driver that allows to use
that driver along with real atmel at24 EEPROM simultaneously.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
These global variables should be under the mutex lock, otherwise they
will be overwritten by other transfers.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
When turned on, the existing i2c dump code is use to log every I2C
transaction at debug level.
This can be very useful for detecting problems with I2C peripherals.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
If an i2c message is for just one byte, instead of logging it with a
hexdump after logging the other message info, just added the one byte to
the same log message.
Since most i2c messages are one byte, this significantly reduces the
number of messages and lines needed to log i2c transactions, from three
line per message to just one. It's also a lot easier to read.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Add an argument to i2c_dump_msgs() to log the data from reads too. And
then rename the function to i2c_dump_msgs_rw() so the API doesn't
change. If the dump is done after a transaction is processed, as
opposed to before, then the read data is valid and can be very useful.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Lock I2C device state when used so that Power Manager doesn't
suspend the device.
Initial state is a suspended device.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Clock and pins used by the I2C device are suspended when power
manager requires it.
Do not compile function i2c_stm32_suspend when PM_DEVICE isn't
enabled as it is left unused and will make the compiler throw
a warning.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Add a locking semaphore so that multiple threads
doing transfers with the same i2c will not produce
unexpected results. The lock will ensure that only one
transfer will happen at a time and it must be completed
before another thread can request a new transfer.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
For NPCX SMB/I2C SMB modules in FIFO mode, the registers include:
* Common registers, offset 0x00-0x0f, accessible regardless of the value
of BNK_SEL
* Bank 0 registers, offset 0x10-0x1e, accessible if BNK_SEL is set to 0
* Bank 1 registers, offset 0x10-0x1e, accessible if BNK_SEL
is set to 1
In the current driver, it uses two structures, `smb_reg` and
`smb_fifo_reg`, to access `Common + Bank 0` and `Common + Bank 1`
registers. But It might be easy to misunderstand that they are two
different modules.
This CL tries to simplify this by the following steps:
1. Use `union` to combine `Bank 0/1` registers in the same structure.
2. Remove `smb_fifo_reg`. We needn't use two structures to present
SMB registers.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Printing of NACK messages should be set to LOG_DBG to avoid spamming.
When we scan whether there is a target device through I2C, if we use
LOG_ERR, it will frequently print out NACK messages. So it is set to
LOG_DBG in the case of NACK.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change Summary: The TX/RX FIFO was not flush on initialization thus
causing bad transactions. Thus, we need to flush the FIFO, and
according to Synopsys DW I2C spec, we can flush TX/RX FIFO by clearing
the enable bit. This is verified with our own I2C test on the SoC with
Synopsys DW I2C IP.
Signed-off-by: Dennis Wang <dennisjw@fb.com>
If present, get the clock value for STM32 I2C from the clock source defined
in the dts.
Otherwise, use pclk.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add support of STM32_DT_INST_DEV_DOMAIN_CLOCK_SUPPORT to condition the
configuration of an source clock for STM32 I2C.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit modifies the way we define the I2C driver by using device tree
instance macros instead of node label names.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add the possibility to use the clock parameter in dts to set the clock
source of I2C devices for all STM32 MCUs.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add a Kconfig option allowing users to configure the transfer timeout
value, as the default 500 ms may not be sufficient in specific cases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The ESP32 series MCUs allow to set a timeout which triggers an error
if the SCL line is unchanged for the specified amount of time.
By default, the ESP-IDF HAL sets the timeout to an arbitrary value of
10 times the bus cycle.
This is not sufficient for chips like the TI bq76952, which pulls the
SCL line low (clock stretching) for several 100 µs.
The timeout should also not be dependent on the chosen bitrate, as it
is defined by the time a chip needs for internal calculation before it
can provide requested data or continue communication.
This commit adds a property to devicetree to allow configuration of
the scl timeout. This value is set via direct register access, as the
ESP-IDF HAL does not provide access to the enable bit and does not
give any information about the maximum size of the timeout (defined
in I2C clock cycles in the register).
Fixes#51351
Signed-off-by: Martin Jäger <martin@libre.solar>
Print the error messages about the state of the host register
when the I2C transfers fail. This is useful for debugging.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
When there is a timeout for an i2c transaction, the i2c driver should do
the recovery logic to make the bus and driver state machine go back to
idle. Otherwise, it will cause the following transaction to fail because
the state machine keeps in an inappropriate state.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Executing code out of RAM on IT8xxx2 requires that the relevant
addresses be mapped onto the CPU's instruction memory bus, referred to
by ITE documentation as Instruction Local Memory (ILM). ILM mappings
configure blocks of RAM to be used for accesses to chosen addresses when
performing instruction fetch, instead of the memory that would normally
be accessed at that address.
ILM must be used for some chip features (particularly Flash
self-programming, to execute from RAM while writing to Flash), and has
historically been configured in the Flash driver. The RAM for that was
hard-coded as a single 4k block in the linker script. Configuring ILM
in the flash driver is confusing because it is used by other SoC code as
well, currently in code that cannot depend on the Flash being functional
or in hand-selected functions that seem performance-critical.
This change moves ILM configuration to a new driver and dynamically
allocates RAM to ILM in the linker script, allowing software use of the
entire 64k RAM depending on configuration. This makes ILM configuration
more discoverable and makes it much easier to correctly support the
CODE_DATA_RELOCATION feature on this SoC.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Possibility to configure i2c speed through I2C_SHELL
command `i2c speed`.
Signed-off-by: Andrzej Kuros <andrzej.kuros@nordicsemi.no>
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Previously, the I2C bus would have an extended idle period on write
operations, and a spurious trailing byte on read operations (after a
final NACK).
This patch relocates the issuance of the stop condition from the driving
thread's context, into the ISR.
Thanks to @benediktibk for discovery and initial patch.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
1. To explicitly set the MSG_START flag on the first message.
2. Remove redundant declare.
3. Using data->msgs->flags is the correct address instead of
msgs->flags.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 pwm. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
This is a follow-up to commits 9974bb043f
and 00ecc66677.
Add one missing `#ifdef CONFIG_PINCTRL` and remove a no longer needed
one to restore the possibility to use this driver without PINCTRL.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add I2C driver for Andes atciic100. Driver supports I2C target mode and
tested on adp_xc7k_ae350 in runtime.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
Add I2C bus recovery support by emitting 9 SCL clock pulses.
It implements the equivalent logic of the i2c_unwedge function in the
ChromiumOS legacy-EC.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The command uses 1 optional parameter and this parameter can be at
maximum MAX_I2C_BYTES.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Pull more function into ram code section to effectively improve
access speed and performance.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Adding I2C FIFO mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
The I2C master supports two 32-bytes FIFOs, channel A and C
are supported now.
I2C FIFO mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.
Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
0.52ms(2.4ms->1.88ms) compared to the original pio mode when the
frequency is 100KHz.
3. It is normal to read sensor data through I2C on Nereid's platform.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
I2C CQ mode cannot enter power policy during transfer.
test: tests\driver\i2c\i2c_api--> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).
Automated using:
```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This is a follow-up to commit e1c0a494b3.
The `tca954x_transfer()` function cannot call `i2c_transfer_dt()`,
because the I2C device address used in the transaction must be the one
passed as the `addr` parameter, not the address of the TCA954xA switch
itself. Hence, this commit restores the call to `i2c_transfer()`.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
i2c_transfer_async is the asynchronous version of i2c_transfer where
the completion of the transfer is notified to the caller using a callback.
This can be used in conjuction with the common callbacks and datatypes
in async.h for directly doing an async transfer with an IPC object
to notify a thread.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The I2C bus lock did not previously enclose the referencing of the
transfers to conduct. If two attempts are made to use the bus at a
similar time, then one set of messages may have been transferred twice.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
The I2C shell would filter the list of devices it knows about to
ones that have a device name that starts with "I2C_". It was the
case that the majority of I2C bus controller devices happened
to be named with the "I2C_" prefix, however there is no guarantee
that is the case. With the remove of label properties from the
devicetree this is even more true.
For now remove the prefix filter and just return the full list
of devices.
Signed-off-by: Kumar Gala <galak@kernel.org>
This PR fixes the instances indexing in the driver's
initialization macros.
The use of DT_INST macros along with other node identifiers
was preventing the driver from initialize correctly in some
cases.
The driver requires the signal mux number value. Hence the need
to use the SoC's peripheral number information and DT_NODELABEL
macro for node id.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
I2C has its own set of device define macro wrappers to provide
automatic stats tracking when enabled for the device class. This
particular driver happened ot be missed in the transition.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The HAS_I2C_DW was to limit Kconfig visibility to only platforms
that utilize the I2C DW IP. The Kconfig for I2C_DW depends on
DT_HAS_SNPS_DESIGNWARE_I2C_ENABLED which will cause the same
visbility limitation to only platforms that have I2C DW devicetree
nodes. Thus we can remove HAS_I2C_DW and its references.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update i2c drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)
Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.
The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a
Signed-off-by: Simon Hein <SHein@baumer.com>
For the !SOC_I2C_SUPPORT_HW_CLR_BUS in which we implement bus
reset via GPIOs, change the devicetree properties to be actual
gpio properties and update the code to reflect this.
Signed-off-by: Kumar Gala <galak@kernel.org>
This split the repeated START condition to STOP + START conditions.
The old implement may cause undefined behavior for gd32 i2c, like
enter STOP condition accidentally.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
If the transaction of write or read is divided into two transfers
(not two messages), the command queue mode does not support.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
