ITE: drivers/i2c/target: Disable the timeout setting
Disable the timeout setting when both the clock and data are in a low state. This allows for I2C host clock stretching without a timeout limit. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
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5de9203af3
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2 changed files with 6 additions and 5 deletions
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@ -1222,11 +1222,9 @@ static int i2c_enhance_target_register(const struct device *dev,
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/* Software reset */
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IT8XXX2_I2C_DHTR(base) |= IT8XXX2_I2C_SOFT_RST;
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IT8XXX2_I2C_DHTR(base) &= ~IT8XXX2_I2C_SOFT_RST;
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/*
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* Set time out register.
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* I2C D/E/F clock/data low timeout.
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*/
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IT8XXX2_I2C_TOR(base) = I2C_CLK_LOW_TIMEOUT;
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/* Disable the timeout setting when clock/data are in a low state */
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IT8XXX2_I2C_TO_ARB_ST(base) &= ~(IT8XXX2_I2C_SCL_TIMEOUT_EN |
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IT8XXX2_I2C_SDA_TIMEOUT_EN);
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/* Bit stretching */
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IT8XXX2_I2C_TOS(base) |= IT8XXX2_I2C_CLK_STRETCH;
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/* Peripheral address(8-bit) */
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@ -1347,6 +1347,9 @@ enum chip_pll_mode {
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/* 0x13: Nack Status */
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#define IT8XXX2_I2C_NST_CNS BIT(7)
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#define IT8XXX2_I2C_NST_ID_NACK BIT(3)
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/* 0x18: Timeout and Arbiter Status */
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#define IT8XXX2_I2C_SCL_TIMEOUT_EN BIT(7)
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#define IT8XXX2_I2C_SDA_TIMEOUT_EN BIT(6)
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/* 0x19: Error Status */
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#define IT8XXX2_I2C_ERR_ST_DEV1_EIRQ BIT(0)
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/* 0x1B: Finish Status */
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