MAX14906 implementation of GPIO function `port_toggle_bits` writes
back old register value instead of inverted new value.
This commit XOR's current output state with requested pins (as expected)
and writes new value to register.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
The MAX149x6 drivers do not implement the generic GPIO function
port_set_masked_raw. The current implementation therefore hard faults due
to dereferencing NULL ptr on calls to gpio_port_set_masked_raw.
This commit adds port_set_masked_raw for both MAX14906 and MAX14916.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
The MAX14906 SetOUT register packs direction bits in [7:4] and output
state in [3:0]. The existing implementation clears all output bits
regardless of pin mask, as the mask is ANDed with 0xf0 before inversion.
This commit fixes that by masking before inverting.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
The MAX14906 can be operated compliantly without directly controlling
EN/FAULT/SYNCH/READY ports. The MAX14906 DTS files already reflect this
optional nature.
This commit makes the driver treat these ports as optional without changing
the business logic of the driver. If these ports are not defined,
certain diagnostic logging calls are simply skipped over.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
The MAX14906 (p36), MAX14915 (p26), and MAX14916 (p28) datasheets state
that the device includes A0,A1,ThrErr bits in CRC calculation. The existing
solution doesnt handle these bits.
This commit passes the 3 top bits of the SDO check byte to the CRC
function, making the CRC calculation datasheet compliant
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
- Adds the g1 driver for eic for microchip devices
- Uses the APIs of the eic driver from gpio driver
Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
If the clock device (i.e., RCC) failed to initialize, we have bigger
problems than trying to call clock_control_{off,on,configure} on it.
Don't bother checking to save some footprint.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add GPIO_PULL_UP and GPIO_PULL_DOWN handling in pin_configure
and enable LP_IO wakeup source in pin_interrupt_configure via
rtcio_ll_wakeup_enable(). Both rtcio_ll_intr_enable() and
rtcio_ll_wakeup_enable() are required for LP_IO wakeup to
function, as clk_en must be set for the interrupt status
register to update.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Set `port_pin_mask` in the GPIO driver for Silicon Labs Series 2
based on Devicetree `ngpios` and `gpio-reserved-ranges`. This
mask is used to validate that the pin numbers passed to the GPIO
API are valid on a given device.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
The gpio_pca_series driver may stop responding if the gpio_int is
asserted between reading the interrupt status and clearing it.
If the interrupt gpio_int is not deasserted by the time the handler
finishes, the interrupt work should be rescheduled.
Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
Add the `DEVICE_API` wrapper to the remaining `gpio_driver_api` instances,
ensuring that each driver API is placed in its respective linker section.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
During configuration the base->ICR1 or base->ICR2 register is written
without an IRQ lock. This can result in unwanted side-effects if the status
bit isn't cleared, or the edge select still needs to be updated.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
- Decouple interrupt settings from gpio drivers, making them configured
and handled independently by tint and ext_irq drivers.
- Remove device-specific hardware definitions in gpio_renesas_rz.h and
take advantage of pinctrl data type and dtsi for certain series.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Use NRF_DT_INST_IRQ_ macros which support building with and without
SW ISR table for all nordic socs.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Found when building with clang with -Winitializer-overrides:
drivers/gpio/gpio_max14906.c:495:29: error: initializer overrides prior
initialization of this subobject [-Werror,-Winitializer-overrides]
495 | DT_INST_FOREACH_STATUS_OKAY(GPIO_MAX14906_DEVICE)
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
rework litex gpio driver.
It is now also supported to change direction.
now uses the reg names to detect if what modes the gpio
controller supports.
use the reg names directly from litex.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Avoid overwriting cached input state while ISR-deferred work is pending.
Previously, port_get_raw() updated pins_state.input via
update_input_regs(), which could corrupt previous_state used for
transition detection.
Fix by reading input registers directly without updating the global cache.
Signed-off-by: Woobin Song <woobin.song@assaabloy.com>
Introduces a GPIO driver that provides generic interfaces
for both interrupt-driven inputs and controllable outputs.
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Add input validation to single-pin GPIO APIs (e.g., gpio_pin_configure)
and emulator-specific helpers to return -EINVAL for invalid pins. This
ensures tests correctly fail when targeting non-existent pins.
For standard port-wide APIs (e.g., gpio_port_set_bits_raw), align behavior
with hardware drivers by masking out invalid pins instead of returning an
error. This mimics hardware behavior where writing to unimplemented bits
is ignored, and ensures compatibility with generic tests that use full
32-bit masks (e.g., 0xFFFFFFFF).
Signed-off-by: Jayvik Desai <jayvik@google.com>
i2c_burst_write is not portable,
as it is not supported by some drivers,
replace its use with i2c_write.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Remove a redundant NULL check on the device pointer in the GPIO
interrupt handler.
The device pointer is dereferenced unconditionally before the check
and cannot be NULL in this context.
No functional change intended.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Drop cat1 from the binding files to enable reuse by other
category devices as well.
Fixes#99174
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Remove duplicated #include directives within the same
preprocessor scope across the Zephyr tree.
Duplicates inside different #ifdef branches are preserved
as they may be intentional.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Ensure that pins configured as inputs are driven high in the port
output register, consistent with open-drain operation. This prevents
inputs from being driven low unintentionally and aligns behavior
with hardware expectations.
Signed-off-by: Josia Strack <j.strack98@gmail.com>
- Reads the Pad Status Register (PSR) to get
the current GPIO input value, instead of the Data Register (DR).
Following IMXRT1170RM.pdf "13.5.2 GPIO Write Mode".
- Enables input buffer via Software Input On (SION)
to get correct pin value in PSR for both input/output pins.
- Issue has been discovered during Safety DIO self-tests.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Support for selecting the IRQ output via the `irq-output-select` property
in devicetree. Updates interrupt configuration and ISR logic to use the
selected IRQ index. For i.MX95 M7, ensures pins and IRQs are configured
only when secure access is allowed by checking PCNS and ICNS registers.
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
When an invalid GPIO configuration is provided for a wake-up pin on
STM32WBA series, display a series-specific message and return an error.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
When an error occurs while attempting to configure a GPIO pin as wake-up
pin, return the error to the caller instead of merely printing a log
message which may not even be displayed.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Microchip MEC parts have a similar GPIO peripheral block. We
create a unified driver for all parts. NOTE: MEC GPIO interrupt
detection sets active status when changed from interrupt detect
disabled to any enabled mode. Driver ISR and interrupt configuration
implementation includes work-arounds for this issue.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The existing device runtime PM model requires applications to call
pm_device_runtime_get()/put() on the GPIO controller device directly,
which is not ideal when GPIO ports are exposed as child nodes.
This update enables runtime PM at the GPIO port (child node) level,
allowing applications to manage power through the port devices instead
of the top-level controller.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
use I2C_INIT_PRIORITY as default for gpio chips,
that are on a i2c bus.
If childs have the same priority as their parents,
the init order is decided by the devicetree ordinals.
This ensures, that these childs are init after their parent.
Because of that gpio chips on a i2c bus can have the
same priority as the i2c controller.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
use if instead of multiple depends on for pca95xx and pca_series GPIO
Kconfig files to improve readability.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Most drivers for Series 2 depend on clock control, but didn't
declare it. Enable clock control by default for Series 2 SoCs.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
- It seems that the mask variants of GPIO functions are not present in
the latest sdk, so replace those with direct register access.
- This was already done in [0], but was reverted due to some hal
problems.
- I am working on a hal update, but since this change does not require a
hal update to work, it would be best to merge this first.
[0]: https://github.com/zephyrproject-rtos/zephyr/pull/83402
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Use a list of ports and FOR_EACH to instantiate GPIO devices instead of
having one line to instantiate each port. This is much shorter and also
makes it easier to add support for new ports, if necessary in the future.
While at it, cover all ports from A to Z since it is now trivial to do so.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
When EC wakes by GPIO, it may fall back to SUSPEND_TO_IDLE
before the host or peripherals have a chance to take further action.
Add a lightweight delay-sleep mechanism to keep system awake
for as short period after a GPIO wake event.
Signed-off-by: Elmo Lan <elmo_lan@realtek.com>
- Enables Digital mode for both input and output GPIO
pins, in gpio_mcux_lpc_configure().
- Fixes#99255
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Use a local accumulator (`cfg`) to build the pin configuration and commit
it to `*pincfg` only once. This keeps intermediate values in registers,
reduces RAM write traffic.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
After trying out a few different approaches, I think having separate
nodes for each bank in devicetree and having a GPIO proxy node for the
controller is the best solution right now.
To be more specific, GPIO proxy solution still allows for bank level
GPIO toggling. The linux kernel GPIO davinci driver is currently limited
to single pin operations. This might not be a problem in Linux, but I
feel like embedded systems would prefer having support for bank level
operations.
This also does not pose a problem for the future implementation of
interrupts due to that fact that the interrupt router is separate device
and will require a separate driver. In fact, the GPIO interrupt router
is shared between main_gpio0 and main_gpio1.
This patch also reverts the previous bank offset related work on GPIO
davinci driver.
The patch has been tested on PocketBeagle 2.
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Use the "zephyr-keep-sorted-start/stop" comment to have CI check
the alphabetical order of includes, to help reducing the chance
of conflicts while contributing drivers.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Cleanup indentation in STM32 GPIO controllers device definition
macros. Replace some uses of COND_CODE_1() with IF_ENABLED() that
is bit more explicit.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Use STM32_CLOCK_INFO(), STM32_DT_INST_CLOCK_INFO(),
STM32_CLOCK_INFO_BY_NAME() and STM32_DT_INST_CLOCK_INFO_BY_NAME()
helper macros in STM32 drivers.
Using these macros ensure the clock division factor is properly
populated according to DT information. Prior these changes some
drivers only got the bus and bits position information and missed
the clock division information which is fine only when this division
factor information is 0.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
The GPIO_MCP230XX config currently depends on the I2C config. This means
that the board/SoC must enable the I2C config to support MCP23xxx devices.
Inverting this dependency allows declaring GPIO_MCP230XX directly in the
board/SoC defconfig without explicitly enabling I2C.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Suggested-by Fin Maaß <f.maass@vogl-electronic.com>
