Commit graph

1572 commits

Author SHA1 Message Date
Jordan Yates
41fe3b9d24 gpio: stm32: initialise according to zephyr,pm-device-runtime-auto
Don't automatically disable all GPIO ports just because
`PM_DEVICE_RUNTIME` is enabled. Require the user to explicitly call
`pm_device_runtime_enable` on the port, or add
`zephyr,pm-device-runtime-auto` to the devicetree node.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-05-02 09:15:26 +02:00
Titan Chen
2ede51b3e9 drivers: gpio: rts5912 support new features
add support new features for get/set configuration:
1. slew rate
2. output driving current
3. schmitt trigger
4. multi-function select

testing by blinky sample.

20250326: remove check interrupt mask to avoid interrupt disable.

Signed-off-by: Titan Chen <titan.chen@realtek.com>
2025-04-30 07:51:46 +02:00
Lucas Tamborrino
5d74f78332 drivers: gpio: Add LP GPIO
Add LP GPIO support for LP Core

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2025-04-25 14:06:18 +02:00
Hoang Nguyen
02eda248e1 drivers: gpio: Add support for RZ/A2M
Add gpio support for RZ/A2M

Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-25 14:05:01 +02:00
Hao Luo
6618a673e5 drivers: gpio: Add support for Apollo510 GPIO
This commit adds support for Apollo510 SoC in ambiq gpio driver

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-21 20:04:31 +02:00
Hao Luo
6f4b92d64d soc: ambiq: Optimize the inclusion relationship of header files
Optimized the inclusion relationship of header files

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-17 09:06:18 +02:00
Stefan Giroux
651ecab53e drivers: gpio: gpio_mcux_igpio: add pull strength configuration
The i.MXRT10xx series have configurable GPIO pull strengths.

These are available for configuration in the pinctrl system, but not for
regular GPIO use.

This commit adds SOC-series specific GPIO configuration bits for selecting
weak or strong GPIO pulls, similar to drive strengths available from other
GPIO pin configuration examples.

This has been tested on a custom i.MXRT1062 product.

Signed-off-by: Stefan Giroux <stefan.g@feniex.com>
2025-04-10 18:05:26 +02:00
Tien Nguyen
3cba2221ed drivers: gpio: Add support for RZ/G2L
Add GPIO support for RZ/G2L

Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-04-09 12:35:54 +02:00
Tim Lin
f67c2a3d33 drivers/gpio: Add GPIO driver of it51xxx
Add GPIO driver for ITE it51xxx series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Krzysztof Chruściński
e33606f300 drivers: gpio: esp32: Add ESP32_ prefix to CPU_ID() macro
Driver is using local macro to get current CPU ID and it is now
in conflict with generic CPU_ID. Added prefix to avoid conflict.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-04-08 08:57:57 +02:00
Samuel Chee
99ae4bf132 drivers: pinctrl: add pinctrl driver for Arm mps2
Adds pinctrl driver for all Arm mps2 targets.

Signed-off-by: Samuel Chee <samche01@arm.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-04-07 15:18:10 +02:00
Gerard Marull-Paretas
bea0a068e1 drivers: gpio: nrf: add support for gpio_pin_get_config
So that pin configuration can be queried.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2025-04-07 08:54:20 +02:00
Victor Brzeski
a1edfb41fd drivers: gpio: fix pcal6534 by updating register map
The PCAL6534 driver simply doesn't work. This is
due to an incorrect mapping of commands to pcal6534
registers.

Signed-off-by: Victor Brzeski <vbrzeski@meta.com>
2025-04-04 09:34:41 +02:00
Nhut Nguyen
8f2879a156 drivers: gpio: rz: Fix a build error
Fix a build error of redefinition of a variable in gpio_renesas_rz.h

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-04-03 06:25:06 +02:00
Raffael Rostagno
4b8dc5f3ff drivers: esp32: Update for shared intc
Drivers update to use shared interrupt allocator for Xtensa
and RISCV devices.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-04-02 19:02:27 +02:00
Quang Le
da076a9924 drivers: gpio: Add support for RZ/T2M
Add GPIO driver support for RZ/T2M

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-02 12:52:54 +02:00
Kesavan Yogeswaran
aa3d3b0bdb drivers: Fix declaration after label compile error
Fix two instances where switch-case labels were followed immediately by
a declaration, which is generally invalid and can cause compilation
failure.

Signed-off-by: Kesavan Yogeswaran <hikes@google.com>
2025-03-31 19:50:50 -04:00
Nhut Nguyen
ea00582873 drivers: gpio: rz: Fix whitespaces and typo
- Add spaces around /* ... */
- Fix a typo and remove a stray space in the description of
renesas,rz-gpio.yaml to make it visible in doc html

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-03-28 08:35:13 +01:00
Quang Le
379dcc719e drivers: gpio: Add support for RZ/V2L
Add GPIO driver support for RZ/V2L

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-03-28 08:35:13 +01:00
Robert Budai
d7e363e358 drivers: gpio: max22190: add max22199 extended support
The MAX22199 is an IEC 61131-2 compliant industrial digital input device.
The MAX22199 translates eight 24V current-sinking industrial inputs to a
serialized SPI-compatible output that interfaces with 3V to 5.5V logic. It
can operate as eight Type 1/Type 3 digital inputs or four Type 2 digital
inputs. The device provides diagnostic functions, including thermal
shutdown, 24V under voltage alarm, 24V missing voltage alarm, and SPI and
CRC communication error detection.

Signed-off-by: Robert Budai <robert.budai@analog.com>
2025-03-27 03:49:44 +01:00
Erwan Gouriou
a98e3181b8 drivers: gpio: stm32: Cleanup unused defines
These defines are unused since 8d97f67159.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-03-26 16:21:34 +01:00
Robert Budai
1489038f3b drivers: gpio: add max14917
MAX14917 is an eight high-side switch, specified to deliver up to 700mA
(min) continuous current per channel. The high-side switches have
on-resistance of 120mΩ (typ) at 25°C ambient temperature

Signed-off-by: Robert Budai <robert.budai@analog.com>
2025-03-25 22:13:01 +01:00
Sven Ginka
d7f6aa2f3c drivers: gpio: fixed - pin toggle (output reading)
Before that fix we read the inpupt register when toggling
gpios. With this fix, we now read the output register for
toggling a pin.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-03-25 00:32:01 +01:00
Mahesh Mahadevan
0cd23dc5b7 drivers: gpio_mcux_lpc: Provide an API to fire callbacks
Provide an API for other drivers to fire GPIO callbacks

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-03-21 09:51:38 +01:00
Mahesh Mahadevan
d035847e0b drivers: gpio: Add PM Action for MCUX LPC driver
Add PM action for MCUX LPC driver

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-03-21 09:51:38 +01:00
Nhut Nguyen
16c77ba448 drivers: gpio: Add support for RZ/A3UL
Add GPIO driver support for RZ/A3UL

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-03-19 03:34:15 +01:00
TOKITA Hiroshi
cbcf36e1a7 dts: arm: renesas: ra: Remove old R7FA4M1AB3CFM configurations
Due to historical reasons, there were two implementations of
R7FA4M1AB3CFM. However, the migration has been completed,
so the old one is now being removed.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-03-17 16:24:42 +01:00
Benjamin Cabé
06e86e95da Revert "drivers: gpio_cc13xx_cc26xx: Update for latest sdk"
This reverts commit 99e7223a1c.

Breaks CI with the following compilation error in SPI.c:52:
error: 'SPI_MASTER' undeclared here (not in a function)

Failing tests (cc3220sf_launchxl/cc3220sf)
- sample.net.sockets.echo.offload.simplelink
- sample.net.sockets.http_get.offload.simplelink
- sample.net.wifi

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-03-17 13:55:34 +01:00
Mika Braunschweig
cc6eaa0cf9 drivers: gpio: davinci: fix config layout
Zephyr GPIO drivers require the pin mask `struct gpio_driver_data` to be
the first element of the driver config. Reordering fixes failures in ASSERT
statements of the GPIO driver due to the base address being interpreted as
supported pin mask.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
2025-03-17 09:26:45 +01:00
Nhut Nguyen
9077d46c5d drivers: gpio: Add support for RZ/T2L
Add GPIO driver support for RZ/T2L

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
2025-03-17 09:26:13 +01:00
Ayush Singh
99e7223a1c drivers: gpio_cc13xx_cc26xx: Update for latest sdk
- It seems that the mask variants of GPIO functions are not present in
  the latest sdk, so replace those with direct register access.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-03-17 09:25:58 +01:00
Ryan McClelland
705491e306 drivers: gpio: shell: fix warning
A warning is generated due to a cast-function-type. Remove the unused
arg.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-03-17 02:21:37 +01:00
Camille BAUD
7955757450 drivers: gpio: Introduce CH32V20x/30x GPIOs support to CH32V0x driver
This introduces support for CH32V20x/30x GPIOs

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-03-14 14:39:30 +01:00
Quang Le
b7f99ffbdd drivers: gpio: Add support for RZ/N2L
Add GPIO driver for RZ/N2L

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-03-14 09:23:50 +01:00
TOKITA Hiroshi
5184fb9257 drivers: gpio: rpi_pico: Add support for RP2350B
As the RP2350B has more than 32 GPIO pins,
we changed the configuration so that it is split into two ports.

To do this, we created a `raspberrypi,pico-gpio-port` node and
moved the previous `raspberrypi,pico-gpio-port` functions to it.

This became a child node of `raspberrypi,pico-gpio-port`, and
`raspberrypi,pico-gpio-port` will remain a gpio mapper.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-03-10 11:20:30 +01:00
Henrik Brix Andersen
63c24d9d34 soc: neorv32: update to support NEORV32 v1.11.1
Update the NEORV32 SoC, peripheral drivers, and board to support NEORV32
v1.11.1. Notable changes include:

- Optional RISC-V ISA Kconfigs are now selected on the board level.
- Peripheral registers are now automatically reset in hardware, no need for
  software initialization code.
- The NEORV32 GPIO controller now supports 32 pins, not 64. Interrupt
  support will be submitted in a separate PR.
- Default board configuration has 64k RAM and is clocked at 18 MHz.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-03-10 11:11:22 +01:00
Tim Lin
0d4f8feb6f drivers/gpio: ite: it8801: Fix the GPIO output configure issue
If the output level does not change to high or low, it should not be
changed to 0.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-03-10 08:59:46 +01:00
Chekhov Ma
c87900aa40 drivers: gpio: adp5585: fix wrong reg during pin configure
The ADP5585_GPO_OUT_MODE_A is used when configuring initial output
during pin configuration, causing pins configured HIGH is incorrectly
configured as open-drain. Replacing the reg with ADP5585_GPO_DATA_OUT
fixes the issue.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2025-03-10 08:59:26 +01:00
Pisit Sawangvonganan
84bc26eeec drivers: gpio: shell: streamline code
Streamline code in multiple places as follows:
- Remove redundant initialization of `ret` to `0`,
  as it is immediately assigned a value.
- Add `len` to store the result of `strlen(argv[ARGV_CONF])` to avoid
  multiple calls to `strlen` within the `for-loop` in `cmd_gpio_conf`.
- Merge separate `shell_print` calls by including a newline `\n`.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-03-07 19:57:50 +01:00
Fabio Baltieri
3d24b8b552 gpio: shell: use the first nodelabel when available
Use the first nodelabel rather than the node name when available for
shell completion as well as "gpio info". This label is always set gpio
nodes as that's what's used for references by device nodes, there may be
some case where a node has multiple labels for some reason but for a
human I reckon it still makes more sense to suggest a label rather than
the address.

This means that the commands would use, for example "gpioa" rather than
"gpio@58020000".

Fall back to the normal node name if there's no label set or if dt
metadata is not enabled.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-03-07 19:57:07 +01:00
Robert Budai
c55204f761 drivers: gpio: extend max14916 to max14915
The MAX14915 has eight high-side switches specified to deliver up to
700mA continuous current with simlar register map and diagnostics
parameters to MAX14916.

Documentation:
https://www.analog.com/en/products/max14915.html

Signed-off-by: Robert Budai <robert.budai@analog.com>
2025-03-07 19:51:07 +01:00
Martin Hoff
13e152a579 drivers: gpio: gecko: add check for interrupt configuration
Add a check for interrupt configuration: if the interrupt line for the
pin is already enabled but for the same port that the user asked, it
should not return EBUSY.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-02-21 15:14:07 +00:00
Fabio Baltieri
a3bd7efb38 gpio: shell: fix a crash where there's less line names than gpios
Don't try to dereference line_names if the index is beyond
line_names_len, this can happen if there's less line names than the
total amount of supported gpios specified.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-02-19 18:48:30 +01:00
Fabio Baltieri
323b0d8cd0 gpio: shell: add a missing static qualifier
line_cmp is only used in this file, make it static.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-02-19 18:48:30 +01:00
Fabio Baltieri
29776b1758 gpio: shell: drop an unnecessary forward declaration
Move SHELL_DYNAMIC_CMD_CREATE after the function, then the forward
declaration is unnecessary.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-02-19 18:48:30 +01:00
Robin Kastberg
318019e0b3 drivers: gpio: unnamed parameters not allowed
This violates Zephyr Rule 44 and causes error Pe141 on IAR.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
2025-02-17 21:15:35 +01:00
Paul Alvin
d12686269f drivers: gpio: xlnx: Add support for versal2 PS/PMC GPIO
Add driver support for Versal Gen 2 PS/PMC GPIO controller by updating
the logic of bank index calculation.

This logic depends on "register" DT property to identify bank index
instead of depending on node instance ID as Versal Gen 2 GPIO banks
are not in sequential order as Zynqmp.

- Versal Gen 2 PS GPIO: Banks(0,3,4)
- Zynqmp PS GPIO: Banks(0,1,2,3,4,5)

Signed-off-by: Paul Alvin <alvin.paulp@amd.com>
2025-02-14 21:02:53 +01:00
Thao Luong
e139d936cb drivers: gpio: Only configs for VBATT pin when RA MCU support
Update GPIO driver for RA: Only configs for VBATT pin when RA
MCU support.

Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
2025-02-14 17:15:43 +01:00
Daniel Schultz
e7fb3c6848 drivers: gpio: davinci: Select PINCTRL
This driver includes pin-muxing functions and requires to have
CONFIG_PINCTRL enabled. Automatically set this config when this
driver is enabled.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2025-02-14 10:48:20 +01:00
Wilfried Chauveau
e9f95b7c92 drivers: gpio: mmio32: remove redundant mask field.
The pin mask is already present in the common structure.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
2025-02-14 10:42:02 +01:00