This commit changes the EXTI driver API to use unsigned types
for all parameters previously typed as `int`, as the signedness
is unneeded and unwanted.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
- Removed zero initialization of `pincfg` structure as all members
are guaranteed to be set.
- Introduced `pfs_cfg` as an intermediate variable to store data in
the CPU register instead of stack.
- Simplified pin setting logic by relying on `pfs_cfg` being
zero-initialized, eliminating the need for explicit bit clearing.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This is just the driver for banks 0 to 3. Bank 4 will come via a
separate commit since it needs a different driver.
Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net>
Add checks to return value of esp_intr_alloc to avoid drivers init
returning 0 when interrupt allocation fails.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Introduced `GPIO_DEVICE_INIT_RA_IF_OKAY` which utilizes `COND_CODE_1`
to reduce the chain of #if DT_NODE_HAS_STATUS(...) #endif
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Writing directly to Px_DATA_REG modifies pins which are not
indicated by mask, causing gpio_basic_api test to fail.
Use Px_SET_DATA_REG and Px_RESET_DATA_REG to modify only
pins indicated by mask.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Set pin to input with no resistors selected when it is configured as
GPIO_DISCONNECTED.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Background of this modification is to make gpio driver code
provided by Renesas vendor to be an official support for Renesas
MCU on Zephyr
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
RGPIO model on RT1180 is same with igpio, however,
current driver can't support.
Update gpio driver to support gpio pad control
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Put disconnected GPIOs to high impedance state by setting their
direction to input and pad control to none.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Using DEVICE_DEFINE, a device without a corresponding DT node can be
defined (for example CRYPTO_MTLS), Z_DEVICE_INIT() does not initialize
dt_meta for such devices, leaving the field as NULL.
device_get_dt_nodelabels() and functions calling it have to handle
dev->dt_meta == NULL to prevent fatal errors.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Pin definitions should correctly reflect the actual drive mode of the GPIO
controller, either push-pull or open drain.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This allows getting rid of the ngpios property, which is implicit in the
part number. It also prepares for configuring pins as open-drain on
supporting chips in the next commit.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This chip is handled by the more generic mcp23xxx driver, which will get a
microchip,mcp23s17 compatible binding in the next commit.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Convert pin control, GPIO and external interrupt controller drivers
based on SIUL2 peripheral to native drivers. This must be done in a
single commit to preserve atomicity, as these drivers depend on each
other.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Fixes: #75390
A wrong bit mask (wrong: IOMUXC_SW_PAD_CTL_PAD_PUS_MASK = 0x8) was used.
That bit mask is for PUE/PUS-type gpio registers, but this is the
section for registers with alternative PULL (PDRV) type layout.
Right bit mask: IOMUXC_SW_PAD_CTL_PAD_PULL_MASK
Signed-off-by: Nils Larsen <nils.larsen@posteo.de>
This is the initial commit to support for gpio driver
for RA8M1 MCU, the coding is base on renesas fsp hal
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Fix a build warning due to the enumerate for the trigger
polarity possibly being (from the point of the compiler)
also GPIO_INT_TRIG_WAKE.
We fix it by simply returning a not valid argument error
which is what most other drivers do if they do something
smart enough.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
When getting gpio info for a specific device with no line
names, invalid memory was accessed.
The check for the length of the line name array has been
corrected to avoid this.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Changes to bring support for esp32c6 SoC.
- clock control
- gpio
- pinctrl
- serial
- timer
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
LPC GPIO binding was wrong in that the reg address
on the simple soc bus was given as an index of the gpio ports
within a gpio controller. Fix this by putting the GPIO node
on the simple bus as a single node with the correct base address,
and make the ports children of this node.
Change the driver to get the port number from the reg address
instead of a custom property, and get base address from DT instead
of the SDK macro definition.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Use some new kernel features to make the experience of finding and
dealing with GPIO devices much more ergonomic by allowing the use of
devicetree node labels to identify GPIO devices by default.
Users who wish to avoid the associated footprint penalty can set
CONFIG_DEVICE_DT_METADATA=n by hand, but I think the convenience is
worth the price as a default. If we're running a shell, then we've
already paid a heavy footprint penalty.
Example output for qemu_cortex_m3:
uart:~$ gpio devices
Device Other names
gpio@40004000 gpio0
gpio@40005000 gpio1
gpio@40006000 gpio2
gpio@40007000 gpio3
gpio@40024000 gpio4
gpio@40025000 gpio5
gpio@40026000 gpio6
Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
Removed the unnecessary initialization of the `ret` variable in
`gpio_stm32_clock_request` where its value is guaranteed to be
overwritten by subsequent operations, then simply returned `ret`.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Introduced `GPIO_DEVICE_INIT_STM32_IF_OKAY` which utilizes `COND_CODE_1`
to reduce the chain of #if DT_NODE_HAS_STATUS(...) #endif
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
In function pcal64xxa_process_input, lock was not released in case of
error when calling inputs_read.
This was causing an infinite wait in the following calls of functions
using I2C bus.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
Introduce the stm32h7RS serie to the gpio driver,
based on the stm32h7
The SBS controller is used to configure the EXTI line among
the different GPIO port.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce a custom STM32_GPIO_WKUP GPIO flag.
Use the newly introduced stm32_pwr_wkup_pin_cfg_gpio() public
function to configure GPIO pins, that have the STM32_GPIO_WKUP
flag in DT, as sources for STM32 PWR wake-up pins, on the condition
that there is a wake-up pin that corresponds to each of them.
These GPIO pins can then be used to power on the system after Poweroff
like a reset pin.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Remove address-of operator ('&') when assigning `gpio_xxx_init`
function pointer in `DEVICE_DT_INST_DEFINE` macro.
This change aims to maintain consistency among the drivers in
`drivers/gpio`, ensuring that all function pointer assignments
follow the same pattern.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Namespaced the generated headers with `zephyr` to prevent
potential conflict with other headers.
Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH`
that is enabled by default. This allows the developers to
continue the use of the old include paths for the time being
until it is deprecated and eventually removed. The Kconfig will
generate a build-time warning message, similar to the
`CONFIG_TIMER_RANDOM_GENERATOR`.
Updated the includes path of in-tree sources accordingly.
Most of the changes here are scripted, check the PR for more
info.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
- Add initial version of CYW920829M2EVK-02 board
- [drivers: clock_control] Make it possible to set up both iho and imo
clocks instead of just one or the other
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
The GPIO API performs unprotected RMW operations that
can cause glitching and race conditions when GPIOs are used by
different threads or ISRs.
Signed-off-by: Jérémy LOCHE - MAKEEN Energy <jlh@makeenenergy.com>
For DA1469x if PM config is selected PM_DEVICE must also
be selected for GPIO to work when device enters/exists
deep sleep.
Previously GPIO and regulator drivers selected PM_DEVICE
when PM was enabled.
Now it is moved to SOC instead.
PM_DEVICE selection in GPIO could result in circular dependency
for mcux if MEMC_MCUX_FLEXSPI (which is already dependent on PM_DEVICE)
was to be additionally dependent on GPIO.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Add mfd_adp5585 and gpio_adp5585 driver. This driver enables ADP5585
as an GPIO expander.
This chip is used as an GPIO expander on i.MX93 EVK. GPIO pinctrl,
read/write and interrupt is supported.
Note that ADP5585 has 2 GPIO banks with 5 pins each. The driver combines
two group into a 16-bit port. Index 0~4 correspond to R0~R4 lines, index
8~12 correspond to C0~C4 lines. Index 5~7 is reserved unavailable.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Usage:
gpio toggle [device] [pin]
Also added Kconfig option so this command can be removed if
resources need to be conserved.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Fix condition in pin number check so that PA15, PB15, etc. can be properly
accessed..
Co-authored-by: Денис <baden.i.ua@gmail.com>
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
