The GPIO subsystem forwards GPIO_INT_WAKEUP from dt_flags into the trig
argument of pin_interrupt_configure(). Wakeup source configuration is
already handled in gpio_esp32_config(); strip the bit before passing trig
to convert_int_type() to avoid -EINVAL return.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
The MFX does not natively support BOTH direction edge
detection. In order to support it, adapt the requested edge
depending on the level at configuration time and toggle the
edge whenever an interrupt is received.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
So far the driver was setting the PU/PD bit properly however
missed setting another bit indicating of a Pull-Down or Pull-Up
are necessary.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Remove the redundant cast to struct device * from struct device * in
some of the GPIO API syscall handlers in gpio_handlers.c
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The following APIs
- gpio_port_set_masked()
- gpio_port_set_bits()
- gpio_port_clear_bits()
- gpio_port_set_clr_bits_raw()
- gpio_port_set_clr_bits()
- gpio_pin_get_raw()
- gpio_pin_get()
- gpio_pin_set_raw()
- gpio_pin_set()
- gpio_pin_toggle()
are currently not syscalls, while the following are:
- gpio_port_set_bits_raw()
- gpio_port_get_raw()
It is therefore possible to set and get any pin of the entire port
from userspace, but only through a few of the APIs.
These APIs should all be either syscalls, or not syscalls.
Align the APIs so they are all syscalls and add syscall handlers for
them in gpio_handler.c
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The GPIO_DDR register uses 1 for output mode and 0 for input mode.
The previous implementation incorrectly swapped these values, causing
gpio_pin_is_input() and gpio_pin_is_output() to return wrong results.
Also mask out unconnected pins using connect_pin to ensure
disconnected GPIOs are not reported as either input or output.
Fixes gpio_get_direction test failures on RTL87x2G and RTL8752H series.
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
Use the optional clocks property to request the GPIO port clock
during driver initialization.
This lets RT7xx GPIO instances rely on the common clock control
path instead of board-specific clock enabling.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Fix a typo in mcux_igpio_configure() for CONFIG_SOC_MIMX8MQ6_M4
where `flag` was used instead of `flags` when checking
GPIO_PULL_DOWN.
Signed-off-by: Paolo Wattebled <paolo.wattebled@savoirfairelinux.com>
Add a driver for the Diodes/Pericom PI4IOE5V6408 8-bit I2C-bus I/O
expander.
The chip provides eight independently configurable GPIO lines, each
with optional pull-up or pull-down resistor and an interrupt source
that fires on transitions away from a programmable default state.
Link: https://www.diodes.com/datasheet/download/PI4IOE5V6408.pdf
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
- Enables input buffer via Software Input On (SION)
to get correct pin value in PDIR for both input/output pins
for IMXRT118X.
- Issue has been discovered during Safety DIO self-tests.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Coming with nrfx 4.3, NRF_GPIO_HAS_DETECTMODE is now
defned only when it is actually accessible.
Removed the hidden Kconfig option and used
nrfx symbol only.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Add a generic GPIO driver for a memory-mapped output latch register.
Include the driver implementation and devicetree binding.
Also add the required Kconfig and CMake integration.
Signed-off-by: Zhaoming Li <lizhaoming634@gmail.com>
Added latch detection mode based on DTS property.
Required register is inaccessible in non-secure
builds and on nRF54H20 SoC. Added hidden Kconfig
to guard it.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Next-generation it51xxx SoCs support more than 256 irqs.
This change extends irq range up to 16 bit depend on
CONFIG_NUM_IRQS.
And the it8xxx2 SoC series only supports 8-bit irq
number size. Add irq type check assertion for this
series.
Tested with:
- it82xx2_evb/it8xxx2_evb/it51xxx_evb_it51526aw:
tests/drivers/gpio/gpio_basic_api
- native_sim/native:
tests/drivers/gpio/gpio_ite_it8xxx2_v2
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
- As described in datasheet, MSPM0L110x has 28 pins in GPIOA.
- Also, it does not contain GPIOB and GPIOC.
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
The PCA series GPIO driver was updated to allow disabling automatic
reset. This feature would enable GPIO expander ports to retain states
which could be helpful for situations where certain pins are configured
in the bootloader and their states need to be retained when switching to
application code.
Signed-off-by: Lay Desai <lay.desai@he360.com>
This patch handles UULP GPIO configuration when the GPIO_INT_WAKEUP
flag is set. It allows the interrupt to wake the device from deep sleep.
The code has been tested by configuring UULP GPIO 2 (button_0) as a
wakeup interrupt on the siwx91x_rb4338a board.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Rename BL61x GPIO and pinctrl drivers to bl61x_808 variants since
BL808 shares identical register layouts. Update compatible strings,
Kconfig, CMakeLists, and BL61x device tree accordingly. Extend the
DMA and IR receiver drivers' BL61x guards to also cover BL808.
Signed-off-by: William Markezana <william.markezana@gmail.com>
The `pinctrl_soc_pin_t` format occupied two uint32_t even though all info
it stores can be compressed in 32 bits only, and also didn't map very well
to the hardware (especially on STM32F1). Due to defects, the format was
also NOT what the `stm32_gpioport_configure_pin()` function consumed to
actually configure a GPIO port, requiring additional decoding/manipulation
logic.
Introduce a vastly reworked format which only requires 32-bit per pinctrl
entry and maps nicely to hardware and becomes the new format consumed by
stm32_gpioport_configure_pin(). This heavily simplifies the pinctrl driver
since it no longer needs to examine the actual values (except to determine
the target GPIO port and pin - this is done on purpose!). The GPIO driver
converts Zephyr flags to this new format too.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Instead of silently ignoring the flags, warn the user when an illegal
GPIO configuration is provided on STM32F1. To avoid breaking backwards
compatibility and tests, the old behavior is however retained.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Simplify the logic translating Zephyr GPIO flags into STM32-specific flags:
- flatten if chain for output type determination
- change how input modes are handled
- introduce new INPUT_FLOAT/INPUT_PUPD pincfg values which are used for
input mode depending on whether or not user requests pull-up/down
- these values can have the PULL_UP / PULL_DOWN OR'ed into them
- share PU/PD decoding between INPUT and OUTPUT mode
While at it, also return -ENOTSUP to caller if attempting to set a pull-up
or pull-down on a disabled pin instead of silently discarding the request.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Move the logic which sets the output level based on configuration to the
common `stm32_gpioport_configure_pin()` function to reduce duplication.
To support the GPIO use case where a pin's configuration is changed without
modifying its output state, a new parameter is introduced which specifies
whether or not the output level should be modified.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add support for retrieving GPIO pin direction
when GPIO_GET_DIRECTION kconfig is enabled.
Signed-off-by: Muhammad Waleed Badar <muhammadx.waleedbadar@altera.com>
Add support for toggling a reset line during GPIO
initialization when a reset controller is available
in the device tree.
Signed-off-by: Muhammad Waleed Badar <muhammadx.waleedbadar@altera.com>
Replace direct register access using raw base addresses with
MMIO accessors to align with Zephyr DEVICE_MMIO API.
Use mem_addr_t for the base address and ensures compatibility with
architectures.
Signed-off-by: Muhammad Waleed Badar <muhammadx.waleedbadar@altera.com>
Realtek Bee series GPIO does not support configuring a pin as both
input and output simultaneously. Return -ENOTSUP to skip related
test cases.
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
Add support for retrieving the direction of selected GPIO
pins. The it51xxx SoC does not support a combined
input-output mode, so return -ENOTSUP when such that mode
is requested.
Tested with:
- tests/drivers/gpio/gpio_hogs
- tests/drivers/gpio/gpio_get_direction
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
gpio_pin_is_valid() and gpio_pin_is_output_capable() use BIT() which
expands to (1UL << n). On 32-bit Xtensa targets, unsigned long is
32 bits, so BIT(n) for n >= 32 is undefined behavior.
This causes gpio1 pins (GPIO32+) to always fail validation with
-EINVAL, breaking any peripheral connected to GPIO32-GPIO48 on
ESP32-S3 (and similar ESP32 variants with gpio1).
Fix by using BIT64() which correctly handles pin numbers >= 32
since SOC_GPIO_VALID_GPIO_MASK is already a 64-bit value.
Signed-off-by: Matin Lotfaliei <matinlotfali@gmail.com>
Configuring a pin with GPIO_DISCONNECTED currently
results in the pin being set as output due to a
fallthrough in the code. This is not supported by
the driver and should return -ENOTSUP instead.
This commit ensures that configuring GPIO_DISCONNECTED
is explicitly rejected and not applied to the hardware.
Signed-off-by: Fabian Kainka <f.kainka@gmx.de>
Add hardware and software strategies to switch pins to low power
mode both in light and deep sleep. Add hold feature to device tree
flags to allow application to configure which pins will be
automatically held (pin state preserved) during sleep.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
The max149x6_config struct declared config_do/config_di with swapped
names, inverting semantics. Both fields are not yet used by the driver,
which is likely the reason why this went unnoticed.
Fixed by assigning each field its matching config union type.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
max14916_pars_spi_diag() wrongly uses same mask as for MAX14906. On
4 channel MAX14906 SDO byte1 upper nibble is DoiLevel bits. On 8 channel
MAX14916, those are fault bits for channels 5-8.
Fixed by checking the full fault byte in the MAX14916 diagnostic parser.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
MAX14916/915 defines GPIO channel specific DT properties, but the driver
does not apply them at init and programs zero values instead. Secondly, the
build test overlay for MAX14916 only sets 4 channels out of 8.
Fixed by initializing OW-on, OW-off, and short-to-VDD from DT during
config and setting the correct channel count in the test overlay.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
gpio_max14916_config_diag() writes ow_on_en to wrong register
(OW_OFF_EN_REG instead of OW_ON_EN_REG).
Fixed by writing to correct register.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
MAX14906/916 diagnostic helpers handle error propagation differently
across diag_chan_get(), pars_spi_diag(), and reg_trans_spi_diag(). This
creates asymmetry in parser/wrapper flows.
Additionally, the parser overwrites transport errors, obfuscating their
source.
Fixed by aligning helpers to standard errno-style return semantics and
failing fast consistently, propagating nested transport errors.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Both MAX14906/916 diag_chan_get paths keep previously cached channel fault
values when the corresponding interrupt bits are not set in later calls.
This leaves stale fault data such that diag_chan_get keeps reporting faults
after they have cleared.
Fixed by clearing fault caches before updating them from current interrupt
status.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Both MAX14906/916 pars_spi_diag paths can lose an captured FAULT1 error
when diag_chan_get() returns 0.
Fixed by only updating the parser return status when diag_chan_get()
returns nonzero.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
max14906_ch_func(), gpio_max14906_config(), and gpio_max14916_config()
ignore return values from lower level register update/write helpers.
This leads to reports of successful pin configuration even when SPI
transactions fail.
Fixed by propagating the first error (effectively forwarding SPI errors)
to the caller, with no behaviour change in success path.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
