Commit graph

1,662 commits

Author SHA1 Message Date
Filip Brozovic
8577bb3e84 drivers: gpio: add driver for nuvoton numicro
This commit adds a GPIO driver for the Nuvoton NuMicro family
of processors.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2022-12-08 18:46:33 +01:00
Maciej Zagrabski
e31c0d0ff4 Revert "drivers: gpio: STM32U5 independant IO supply"
This is already fixed in zephyrproject-rtos/hal_stm32#147.

This reverts commit 5b4ad9127f.

Signed-off-by: Maciej Zagrabski <mzi@trackunit.com>
2022-12-08 09:56:35 +00:00
Bartosz Bilas
e077fb73ec drivers: tests: replace usage of spi_is_ready with spi_is_ready_dt
`spi_is_ready` function is being deprecated in favor of
`spi_is_ready_dt` so let's replace the old usage in the tree.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-12-07 09:40:23 -06:00
Michał Barnaś
23a04b8b0a gpio: cleanup the nct38xx driver
Reorganize includes and fix the indentation of code.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-12-06 10:10:36 -05:00
Michał Barnaś
59766b52be gpio: add support for get_config and get_direction in nct38xx
This commit adds support for get_config and get_direction functions
for the nct38xx IO expander family.
Also applies the clang-format changes.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-12-06 10:10:36 -05:00
Michał Barnaś
c11af96135 gpio: fix the nct38xx driver
This commit fixes the comment and adds the missing assignment of
return value from i2c read byte command in the nct38xx driver.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-12-06 10:10:36 -05:00
Mulin Chao
0893ca8c2f driver: gpio: npcx: correct the usage of npcx voltage flags
In npcx ec series, two detection levels, 3.3V (default) and 1.8V are
supported during gpio configuration. But the current implementation
always selects default detection level whether NPCX_GPIO_VOLTAGE_1P8 is
set. This PR is a fix for this issue.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-11-28 09:56:33 +00:00
Dawid Niedzwiecki
2d93f03c25 driver: gpio: rt1718s: Add RT1718S GPIO driver
RT1718S is an i2c-based TCPC chip that supports 3 additional GPIOs.
The pins can be used for USB-C operations e.g. handling FRS, but they
can also work as usual GPIOs.

Add a driver for the RT1718S GPIO and a handler for an alert signal from
the chip. The handler reads the alert register once asserted and calls
the GPIO interrupt handler if needed(Vendor-defined alert).

gpio_rt1718s.c file and "richtek,rt1718s" node collect common properties
and data for all RS1718S functionalities. The file can be extended for
TCPC driver. rt1718s.h file also defines inline functions with i2c
operations common for all drivers. The common header and source files
can be moved to tcpc directories once the tcpc driver is added since it
is the main functionality.

Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
2022-11-28 10:48:53 +01:00
Gerard Marull-Paretas
eaadea5508 drivers: gpio: npm6001: initial driver
Add GPIO driver for the GPIO controller embedded in the nPM6001 PMIC.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-22 11:05:19 +01:00
Jason Yuan
6ff0b79d74 drivers: gpio: Add TCA6424A driver
The driver supports 24 gpio pins which are numbered sequentially from
0 to 23.

Signed-off-by: Jason Yuan <jasonyuan@google.com>
2022-11-18 10:10:11 +01:00
Armin Brauns
53a3ff0dff drivers: mcp230xx: make config struct const
`struct device::config` is a `const void *`, so this struct does not need
to be mutable.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2022-11-15 19:10:14 -05:00
Armin Brauns
1cfd54db7e drivers: mcp230xx: fix for multiple instances
Parts of the macro used `inst`, others `n` for the instance number; only
`n` was actually defined (so `inst` expanded to the empty string, causing
name errors with more than one instance).

Unify everything to `inst`.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2022-11-15 19:10:14 -05:00
Armin Brauns
6468a4458b drivers: mcp230xx: formatting
It's a formatting cleanup. Not much to explain here, but CI requires a body
text.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2022-11-15 19:10:14 -05:00
Gerard Marull-Paretas
b1552001bf drivers: gpio: npcx: fix usage of deprecated voltage macros
The NPCX driver did use deprecated voltage macros. Define vendor
specific flags instead.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-11 11:00:26 +01:00
Gerard Marull-Paretas
109d4e4e78 drivers: gpio: it8xxx2: fix usage of deprecated voltage macros
The pin get function was using deprecated macros. Note that the set
implementation already uses vendor specific flags.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-11 11:00:26 +01:00
Daniel Skatt
a94263784b gpio_mcp23sxx_fix: spi_msg and multiple inst
Fixed how data is read in mcp23sxx_read_port_regs
The data is now stored in an array to get the
actual data from spi

Signed-off-by: Daniel Skatt <daniel.skatt@gmail.com>
2022-11-09 15:55:39 -05:00
Daniel Skatt
f921ff1fc8 gpio_mcp23sxx_fix: spi_msg and multiple inst
Changed SPI message from 2 seperate to 1
Fixed problem using multiple instances

Signed-off-by: Daniel Skatt <daniel.skatt@gmail.com>
2022-11-09 15:55:39 -05:00
TOKITA Hiroshi
c5c0a1ae75 drivers: gpio: gd32: add dependency on the EXTI
The GPIO pin interruption depends on the EXTI.
Add "select" to clarify the dependency.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-11-09 06:26:41 -05:00
Dat Nguyen Duy
da04197fdf drivers: gpio_s32: expose gpio_utils.h
Expose gpio_utils.h to follow updates in #51526

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-04 17:44:08 -04:00
Dat Nguyen Duy
6664953f12 drivers: gpio: support GPIO input with interrupt for NXP S32Z27
Add support input interrupts for GPIO pins on NXP S32Z27
SoC. The driver will convert GPIO pin to respective
interrupt line that will be processed by External
Interrupt Controller.

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-04 17:44:08 -04:00
Guy Morand
a124203929 drivers: gpio: gpio_mcux_lpc: Use arbitrary amount of IRQ
Zephyr implementation is limited to 4 IRQ per GPIO bank when up to 8 is
theoritically possible.

It is now possible to use until 8 IRQ per GPIO bank. This can be
achieved with minimal effort in a device tree overlay:

&gpio0 {
	interrupts = <4 2>,<5 2>,<6 2>,<7 2>,<32 2>,<33 2>;
};

&gpio1 {
	interrupts = <34 2>,<35 2>;
};

Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
2022-11-02 10:34:00 +01:00
Guillaume Gautier
5b4ad9127f drivers: gpio: STM32U5 independant IO supply
Fix the enabling of the independant IO supply.
Function LL_PWR_EnableVddIO2 is called LL_PWR_EnableVDDIO2 on U5.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2022-11-01 12:00:25 +01:00
Balaji Kulkarni
7f1a5cce12 drivers: gpio: expose gpio_utils.h to external GPIO drivers
Expose "gpio_utils.h" header for external GPIO drivers.

Fixes #48609.

Signed-off-by: Balaji Kulkarni <balaji.kulkarni92@gmail.com>
2022-10-27 15:38:51 +02:00
Nick Kraus
48fce027a0 drivers: gpio: Add Open-Drain Support
Adds open drain support to atmel,sam-gpio drivers, by writing to the
PIO_MDER or PIO_MDDR registers during gpio configure.

Signed-off-by: Nick Kraus <nick@nckraus.com>
2022-10-19 16:06:40 +02:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Manuel Arguelles
48c4b93b12 drivers: gpio: add support for NXP S32 devices
Implement GPIO driver minimal API's for NXP S32 devices, based on SIUL2
peripheral. SIUL2 allows to control the pins electrical characteristics
such as internal pull resistors, pin direction and more.

GPIO driver API's for interrupts will be implemented in a future patch.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Manuel Arguelles
e7384974c8 drivers: gpio: xlnx: add missing headers
Add missing headers for sys_* and IRQ related API's.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-12 17:41:11 +09:00
Anas Nashif
3d85ae37b6 arm: add missing includes
Add missing includes that were previously included indirectly.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 18:37:53 -04:00
Gerard Marull-Paretas
1992699e07 drivers: gpio: it8xxx2: add missing chip_chipregs.h/soc_common.h
Register definition header was missing, SoC common header as well (for
ite_intc_get_irq_num).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
4649e2347e include: add missing soc.h include
Some SoCs define stuff in soc.h, used in drivers or SoC code. Note that
soc.h is not introduced here as a catch-all header. soc.h optimizations
or removal is out of the scope of this patch.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
acc8cb4bc8 include: add missing irq.h include
Some modules use the IRQ API without including the necessary headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
f7a5b47dff include: add missing devicetree.h include
Some files make use of DT APIs without including devicetree.h.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
34a6848887 include: add missing arch/cpu.h include
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
David Leach
9e5ee5d998 drivers: gpio: remove pinmux dependency in lpc11u6x Kconfig
Previous commit removed pinmux from the platform but neglected to
remove the dependency in this Kconfig resulting in build failures
when target application configures GPIO support.

Fixes #51144

Signed-off-by: David Leach <david.leach@nxp.com>
2022-10-11 08:25:46 -05:00
Anisetti Avinash Krishna
8df2568a20 soc: x86: Clean up GPIO related defines
Clean up and refactor x86 SoC headers in preparation of adding
new platforms in the future.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2022-10-10 19:17:03 +03:00
Gerard Marull-Paretas
d1686dfbfb drivers: gpio: it8xxx2: log error instead of printing
printk must not be used to log, we have log API for that.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-06 15:35:00 +02:00
Andrei Emeltchenko
005a4d8a31 gpio: Fix gpio_manage_callback() logic
gpio_manage_callback() returns -EINVAL if it could not remove
callback. However if the list is empty success is returned when trying
to remove callback.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-04 14:10:05 +00:00
Josia Strack
ba7eb1025a drivers: gpio: Add driver for pcf8574
Adds a driver for pcf8574 via i2c.

Signed-off-by: Josia Strack <josia.strack@ithinx.io>
2022-10-03 13:56:32 +02:00
Pieter De Gendt
ff8a90b1de drivers: gpio: Add SDL emulated GPIO support
This commit adds a driver to simulate GPIO state and interrupts
using the keyboard when using SDL.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-10-03 10:12:03 +02:00
Pieter De Gendt
bd71698a66 drivers: gpio: pca953x: select I2C
Select I2C instead of depending on it, following upstream policy.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-10-03 10:12:03 +02:00
Dino Li
db50a7aca7 drivers: gpio: it8xxx2: add support for GPIO_DISCONNECTED flag
This change was made to support the flag.
fixes: #50681

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-09-29 14:33:53 +00:00
Sylvio Alves
82bd341018 drivers: gpio: esp32: fix error when using input only pins
Input pins in ESP32 (34 to 39) have no pull-up / pull-down internally.
Current behavior is that gpio driver fails when "disabling it", which
should not happen. It need to fail only when enabling this feature.

Fixes #50615

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-28 07:52:29 +00:00
Daniel DeGrasse
5980aa0196 drivers: gpio: gpio_mcux_igpio: handle gpio-reserved-ranges property
Add code to handle parsing the gpio-reserved-ranges property present on
iMX GPIO controllers, so that gpio controllers with gaps in their pin
indexing can still have pinmux settings applied correctly.

Fixes #50142

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-09-21 13:50:26 -05:00
Erwan Gouriou
e1cb0845b4 drivers: gpio: stm32: Apply GPIOG specific code to U5 series
In STM32U5 as well it is required to enable VDD before use.
Difference is that U5 enables this under PWR_SVMCR_IO2SV flag.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-20 10:00:02 +00:00
Jeremy Bettis
bf845a273b gpio_emul: Fail at build time if ngpios is too big
Add BUILD_ASSERT to check max val of ngpios. If someone sets ngpios to
more than 32, and acts on pin 32 or higher, memory corruption will
result. This is only a problem with the emulator, real hardware
will have limits that are probably much smaller.

Signed-off-by: Jeremy Bettis <jbettis@google.com>
2022-09-16 09:02:01 +01:00
Sylvio Alves
b801a83d92 drivers: gpio: esp32: fix missing rtcio pin mapping
PR #49550 missed adding proper RTCIO pin mapping
in a few rtcio functions calls, which causes board
to crash. This fixes it.

Closes #50238

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-15 17:26:18 +01:00
Gerard Marull-Paretas
8081d7f2a4 drivers: s/DT_CHILD(DT_DRV_INST(n), ...)/DT_INST_CHILD(n, ...)
Use instance version of DT_CHILD when possible.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-06 08:45:25 -07:00
Gerard Marull-Paretas
455b95b6c2 drivers: gpio,pinctrl: gd32: use clock control API
Use the clock control API to enable peripheral clocks. Note that both
GPIO and pinctrl drivers are updated at once since they share some IP
blocks.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00