Commit graph

1,662 commits

Author SHA1 Message Date
Manuel Argüelles
dcb570985b gpio: nxp_s32: use CONFIG_GPIO_INIT_PRIORITY
Use `CONFIG_GPIO_INIT_PRIORITY` instead of the generic device driver
init priority.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-08-09 08:34:18 +00:00
Jordan Yates
86050556c0 gpio: stellaris: implement gpio_pin_get_config
Implement `gpio_pin_get_config` for the stellaris platform, and by
extension `qemu_cortex_m3`.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-26 08:16:44 +00:00
Marek Matej
6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Jordan Yates
d63999af6e Revert "gpio: stellaris: implement gpio_pin_get_config"
This reverts commit c72577d709.
2023-07-25 14:17:11 +02:00
Jordan Yates
c72577d709 gpio: stellaris: implement gpio_pin_get_config
Implement `gpio_pin_get_config` for the stellaris platform, and by
extension `qemu_cortex_m3`.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-25 09:13:16 +02:00
Armin Brauns
c094bd688a drivers: mcp23xxx: fix deadlock in interrupt callbacks
Interrupt callbacks may want to configure GPIO pins on the port expander,
e.g. to change the polarity of a level interrupt. This would cause a
deadlock because the callback handler would still be holding the lock.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-07-22 06:01:20 -04:00
David Leach
a6a129c971 drivers: gpio: fix coverity memory overwrite error
memcpy of a sub-structure in a structure was using the structure size
of the parent structure instead of the sub-structure.

fixes: #59548

Signed-off-by: David Leach <david.leach@nxp.com>
2023-07-21 10:55:21 +00:00
Andy Sinclair
4048348e3e drivers: gpio: gpio_npm1300: Added reset and power loss modes
Added configuration of nPM1300 GPIO pins as reset or
power loss warning.

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-07-12 14:36:56 +02:00
Alberto Escolar Piedras
963422111c driver gpio nrfx: Fix undefined output in gpio_nrfx_port_get_direction
gpio_nrfx_port_get_direction() is meant to check which inputs
are enabled, and does so by checking one bit at a time
and setting that bit into the "input" parameter.
But "input" was never zeroed, so any garbage ones it
may have remains.
Zero it.

This fixes a problem where if the "input" parameter was not
zeroed by the caller, the result of the funcion call
is undefined.

Detected by valgrind on:
tests/drivers/gpio/gpio_get_direction

Conditional jump or move depends on uninitialised value(s)
   by gpio_get_direction_test_disconnect (main.c:64)

Conditional jump or move depends on uninitialised value(s)
   by gpio_get_direction_test_output (main.c:102)

When running this test for the nrf52_bsim.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-07-07 05:12:09 -04:00
Alberto Escolar Piedras
1457b361b6 drivers gpio SDL emul: Split in top and bottom
Split the SDL GPIO emulator driver in a top and bottom
to enable using it with embedded libCs.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-07-06 16:04:15 +02:00
Wei-Tai Lee
8560fb3192 drivers: gpio: andes_atcgpio100: cleanup redundant macros
Remove redundant macros.

Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2023-07-05 09:59:15 -04:00
Wei-Tai Lee
0e8477ed43 drivers: gpio: andes_atcgpio100: implement port_get_direction function
Add support for port_get_direction function in andes atcgpio100 driver.

Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2023-07-05 09:59:15 -04:00
Eric Holmberg
acde5fe199 driver: gpio: fix shell blink command
The blink command should blink until the user presses a key, however on
some systems a pending keypress is present when entering the loop
causing it to immediate exit before getting a chance to blink.

Add a dummy read to clear the buffer before starting the blink loop.

Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
2023-07-04 08:13:34 +00:00
Alberto Escolar Piedras
9445ca017c drivers gpio_nrfx: Don't use directly CMSIS instrunction intrinsic
To ease building for workstation tests, instead of using
the ARM CMSIS instructions instrinsics directly,
use the NRFX macro that uses the compiler builtins when
necessary.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-06-30 16:04:51 +02:00
Alberto Escolar Piedras
7d5eea869d drivers gpio_nrfx: Get peripheral address from HAL
Instead of getting the hardcoded address from the DT structure
use its symbolic name (Also from DT) which will be resolved
by the nRF HAL definitions.

This allows the GPIO peripherals' addresses to be redefined
for the simulated targets.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-06-30 16:04:51 +02:00
Manojkumar Subramaniam
1ca6a5d77f drivers: gpio: gpio_efinix_sapphire: initial version
Add GPIO driver for Efinix Sapphire SoCs.

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2023-06-27 12:09:57 +00:00
Fabio Baltieri
bb5f421ade gpio: npm1300: lower init priority
Lower the priority of the npm1300 gpio driver. The GPIOs are used by
some regulator nodes in the default shield config, but regulators are
initialized before the gpios. Lowering the GPIO priority to sort thigs
out.

Found with the build time priority checking feature:

$ west build -p -b nrf52dk_nrf52832 samples/shields/npm1300_ek \
  -DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /soc/i2c@40003000/pmic@6b/regulators/LDO2 POST_KERNEL 76 <
  /soc/i2c@40003000/pmic@6b/gpio-controller POST_KERNEL 80
ERROR: /soc/i2c@40003000/pmic@6b/regulators/LDO1 POST_KERNEL 76 <
  /soc/i2c@40003000/pmic@6b/gpio-controller POST_KERNEL 80
ERROR: /soc/i2c@40003000/pmic@6b/regulators/BUCK2 POST_KERNEL 76 <
  /soc/i2c@40003000/pmic@6b/gpio-controller POST_KERNEL 80
ERROR: /soc/i2c@40003000/pmic@6b/regulators POST_KERNEL 75 <
  /soc/i2c@40003000/pmic@6b/gpio-controller POST_KERNEL 80
ERROR: /soc/i2c@40003000/pmic@6b/regulators POST_KERNEL 75 <
  /soc/i2c@40003000/pmic@6b/gpio-controller POST_KERNEL 80
ERROR: /soc/i2c@40003000/pmic@6b/regulators POST_KERNEL 75 <
  /soc/i2c@40003000/pmic@6b/gpio-controller POST_KERNEL 80

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-06-23 09:23:22 +02:00
Declan Snyder
7e44efe70a drivers: gpio_mcux_lpc: Guard NXP Pint code
Guard NXP PINT related code with #ifdef CONFIG_NXP_PINT.

This prevents build errors on platforms that do not have a PINT but have
LPC GPIO.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-06-22 10:48:24 +02:00
cyliang tw
0fd564ef7f drivers: gpio: support for Nuvoton numaker series GPIO
Add Nuvoton numaker series GPIO support, including interrupt mode and
also integrate clock control.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-21 09:26:00 +00:00
Andy Sinclair
68589ca0f1 drivers: gpio: npm1300: Use MFD register functions
Local register read/write functions have been removed and replaced
with calls to the new MFD functions.

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-06-19 11:02:58 +02:00
Mykola Kvach
0ef6454c6f drivers: gpio_rcar: add memory mapping to driver
Add memory mapping to driver in order to use driver with platforms based
on Cortex A with enabled MMU.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-06-19 08:39:14 +02:00
Daniel Leung
26ecaba4af drivers: syscalls: use zephyr_syscall_header
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-06-17 07:57:45 -04:00
Henrik Brix Andersen
5e9de122c5 drivers: gpio: pca95xx: check gpio_add_callback() return value
Check the return value from gpio_add_callback() and fail driver
initialization if non-zero.

Fixes: #58584

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-06-13 06:56:24 -04:00
Caspar Friedrich
24622f36c8 drivers: gpio: fxl6408: Fix Kconfig dependency for log level config
This makes Kconfig logging options for this driver depending on whether
the driver is enabled or not.

Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
2023-06-06 06:51:48 -04:00
Vincent Geneves
06e4ba88b4 drivers: gpio: pca95xx: add latch for interrupt pins
Basically, once a pin is configured for interrupt, we enable the latch
on it, in order not to miss short pulses.
The bottom half of the interrupt then reads the input port twice, to
read the latch and then read the potentially new state of the pins, to
compute the posedge, negedge, and level callbacks accordingly.

Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
2023-05-28 04:05:31 -04:00
Vincent Geneves
6612f1e4d5 drivers: gpio: pca95xx: Reduce data transfer over I2C
When accessing GPIO by pin, access only the required port register
(instead of systematically accessing both PORT0 and PORT1).

Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
2023-05-28 04:05:31 -04:00
Robert Hancock
fc73d6a7b9 drivers: gpio: xlnx: run clang-format
Clean up whitespace etc. using clang-format after previous changes. No
functional changes intended.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2023-05-26 21:32:23 -04:00
Robert Hancock
ca3a3c1783 drivers: gpio: xlnx: Add interrupt support
Added support for interrupt-driven GPIO for this driver if an interrupt
line is defined. Note that interrupt support is optional in the GPIO
core so it may or may not be present.

The core provides a single state change notification whenever any line
changes state on a given bank, so we need to check the states of the
lines ourselves to determine what has actually changed.

Also, the driver treats the first and second GPIO banks as mostly
separate devices, but a single interrupt is shared by both banks, so the
ISR ends up being registered by the first bank which also triggers
handling on the second bank if required.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2023-05-26 21:32:23 -04:00
Robert Hancock
1f59cd26be drivers: gpio: xlnx: Fix property reading for second channel
The properties being read for the all-inputs and all-outputs flags in
the driver for the second GPIO channel did not match the ones listed in
the DT schema or the existing device tree files. Fix this.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2023-05-26 21:32:23 -04:00
Gerard Marull-Paretas
76412f6aa0 drivers: gpio: npm6001: select MFD and adjust init priority
Make sure MFD driver for nPM6001 gets built, and, that GPIO driver comes
later in the init sequence.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-24 19:39:55 -04:00
Andy Sinclair
29d6149ca6 drivers: gpio: npm1300: Added status readback
Status readback has been added in the latest silicon revision.
.port_get_raw and .port_toggle_bits are now supported

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-05-22 10:15:46 +02:00
Mulin Chao
9da9c90639 intc: miwu: npcx: improve interrupt latency of miwu input events
To reduce the interrupt latency of MIWU events, the driver prepares a
dedicated callback function item list for each MIWU group in this PR. We
needn't check the MIWU table and group of the event in ISR. And the
maximum item number of each list is also limited to 8. After applying
this PR, the interrupt latency reduces to ~10us consistently.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-05-17 09:48:54 +02:00
Manimaran A
79ee5a876f drivers: gpio: Microchip MEC172x GPIO driver glitch fix
A glitch was observed if a GPIO PIN was configured to a
non-default state by ROM and then Zephyr programs the pin
for the same configuration. Root cause is GPIO hardware
implementing two output bits for each pin. The alternate
output bit is in the pin control register and is r/w by
default. The other bit exists in the GPIO parallel ouput
register and is read-only by default. The hardware actually
reflects the pin's output value into both bits. The fix is
to configure the pin with alternate output bit read-write
and the last step is to disable alternate output which
enabled read-write of the parallel bit. GPIO API's can
then use the GPIO parallel out registers. Add logic to
return an error from the GPIO interrupt configure API if
a pin is not configured as an input. Hardware only performs
interrupt detection if the input pad is enabled.
Hardware supports a pin being configured for both input
and output. Applications should add the GPIO_INPUT flag
to all pin configuration requiring interrupt detection.
The interpretation of input and output flags for the
get configuration API appears to be only one of the
flags can be set. Please refer to the GPIO driver tests.
Updated GPIO interrupt configure to clear the input pad
disable bit due to interrupt detection HW is connected
only to input side of pin.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-05-16 18:52:44 -04:00
Benedikt Schmidt
ecac441171 drivers: gpio: implement GPIOs in ADS114S08
Implement GPIO exander within the ADC ADS114S08.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-05-11 12:04:15 -04:00
Andriy Gelman
7ed4531dbb dts: arm: infineon: xmc4xxx: Add Port 14/15 to device tree
Add Port 14/15 to device tree. These ports can only be configured as input.
Error out in gpio driver if user sets them as output.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-05-02 12:34:55 +02:00
Gerard Marull-Paretas
c4c5f57d59 drivers: all: imx: remove conditional support for pinctrl
The iMX platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Gerard Marull-Paretas
989d103d53 drivers: all: mcux: remove conditional support for pinctrl
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Krzysztof Boronski
df7f10422e boards: arm: efr32bg27_brd2602: Initial support
Adds initial support for efr32bg27_brd2602 - Thunderboard-style board.
Supported features are:
* counter
* gpio
* uart

Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
2023-04-21 12:55:06 +02:00
Gerard Marull-Paretas
1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Tim Lin
491e3e6477 ITE: drivers/gpio: Add gpio_ite_it8xxx2_v2 driver
This driver is made for it82xx2 series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-04-19 03:48:38 -04:00
Daniel DeGrasse
36cc74e7e8 drivers: gpio: gpio_mcux_lpc: add support for module interrupts
On iMX.RT devices, the number of GPIO pins exceeds the maximum of
64 that the PINT interrupt controller can support. Therefore, two
interrupt lines are now shared between the GPIO modules.

This patch allows the user to set the interrupt source for a GPIO
peripheral. For most LPC devices, this will always be the PINT. For some
RT devices, the PINT cannot use pins on GPIO modules other than 0 and 1
as input, and thus the INTA and INTB sources should be used.

Since Zephyr does not support sharing these interrupt between all GPIO
controllers, the user must configure a subset of all GPIO controllers to
use the shared module interrupts. An example of how to do so is provided
for the RT595 EVK.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-04-18 16:14:57 -05:00
Daniel DeGrasse
b8a99a27cc drivers: gpio: gpio_mcux_lpc: remove PINT code
Remove PINT management code from the LPC GPIO driver, as this code is
now contained within the PINT interrupt controller driver, which exposes
an interface to install interrupt callbacks.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-04-18 16:14:57 -05:00
Andy Sinclair
0d68c86c95 drivers: gpio: npm1300: Initial driver for nPM1300 PMIC
Initial GPIO driver for NPM1300 PMIC

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-04-17 10:14:40 +02:00
Gerard Marull-Paretas
a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Mahesh Mahadevan
174824f1cb drivers: gpio: Update NXP GPIO driver for the updated IP Block
1. Move the GPIO mux setting to the soc layer. The GPIO MUX
value may vary based on the SoC Family
2. Enable the digital input buffer if available

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-04-06 14:14:11 -05:00
Sung-Chi Li
532bd562fa drivers: gpio: numicro: Implement enable/disable pin interrupt
Implement the GPIO_INT_MODE_ENABLE_ONLY and GPIO_INT_MODE_DISABLE_ONLY
on numicro GPIO driver.

Signed-off-by: Sung-Chi Li <lschyi@google.com>
2023-04-06 11:44:07 -04:00
Sung-Chi Li
db379eee6f driver: gpio: npcx: Implement enable/disable pin interrupt
Implement the GPIO_INT_MODE_ENABLE_ONLY and GPIO_INT_MODE_DISABLE_ONLY
on npcx GPIO driver.

Signed-off-by: Sung-Chi Li <lschyi@google.com>
2023-04-06 11:44:07 -04:00
Sung-Chi Li
ab77ce0cb8 drivers: gpio: stm32: Implement enable/disable pin interrupt
Implement the GPIO_INT_MODE_ENABLE_ONLY and GPIO_INT_MODE_DISABLE_ONLY
on stm32 GPIO driver.

Signed-off-by: Sung-Chi Li <lschyi@google.com>
2023-04-06 11:44:07 -04:00
Sung-Chi Li
1f7b0c440d drivers: gpio: it8xxx2: Implement enable/disable pin interrupt
Implement the GPIO_INT_MODE_ENABLE_ONLY and GPIO_INT_MODE_DISABLE_ONLY
on it8xxx2 gpio driver.

Signed-off-by: Sung-Chi Li <lschyi@google.com>
2023-04-06 11:44:07 -04:00
Sung-Chi Li
21b2d3aa63 drivers: gpio: Implement pin interrupt enable and disable
Implement the driver method pin_interrupt_enable and pin_interrupt_disable.
This commit fixes getting the get_pending_int by updating the interrupts
field in the gpio_emul_data filed when interrupt is triggered. Also,
introduces a new filed enabled_interrupts to better simulate the
behavior of the interrupt pending and whether the interrupt is
enabled/disabled.

Signed-off-by: Sung-Chi Li <lschyi@google.com>
2023-04-06 11:44:07 -04:00