The temperature being computed using a float variable, use
sensor_value_from_float() instead of sensor_value_from_double(). This
saves some flash.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Previous value just activated the ability to trigger for both edges,
without (de)-activating the gpio. This caused an assrtion error in GPIO.h.
Fixes#71227
Signed-off-by: Juliane Schulze <juliane.schulze@deveritec.com>
Let the callback execute after the interrupt status has cleared.
Because if the callback is executed before the interrupt status
is cleared, it might cause subsequent counter interrupts to fail to
trigger due to the callback function taking too long to execute.
Signed-off-by: Kevin Wang <kevinwang821020@google.com>
Add driver for Festo VEAA-X-3 series proportional pressure regulator.
The driver assumes that the maximum ADC value matches the maximum
output from the device, and that the maximum DAC value matches the
maximum input value for the device. External hardware is probably
required between the ADC/DAC and the device.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix async configure function not being called
when the irq driven api is not used, which
both causes a build warning and would not
work at runtime.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
DWC2 documentation unfortunately assigns somewhat confusing semantics to
endpoint "enable"/"disable" and "activate"/"deactivate". The Zephyr USB
device stack endpoint enable/disable refers to DWC2 activate/deactivate.
The DWC2 endpoint enable/disable actions can be loosely referred to
Zephyr USB stack enqueue/dequeue.
Rename the functions and rework internal working to match DWC2
Programming Guide. This makes endpoint halt work as expected by the
stack and therefore fixes all classes that rely on correct STALL
handling. Most notable STALL user is the Mass Storage class.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
DWC2 programming guide mentions that SETUP can only be processed by
application after DOEPINTn.SETUP interrupt. Not respecting this
requirement makes setting Global OUT NAK hang while waiting for
GOUTNAKEFF interrupt until the host starts next control transfer.
Global OUT NAK is necessary if the application ever wants to properly
cancel any ongoing transfer.
Change the processing to comply with the programming guide.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
This commit should fix the followings:
1. When an alarm event is initialized, the driver should only
consume the valid alarm fields, based on the given mask.
Otherwise, the driver should use default valid subfield
values.
2. Setting an alarm event should not return with error code
if the timer and/or calendar counters have yet to be
initialized, explicitly. Instead, a log warning should be
issued.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
The power rail of a peripheral block should always be
acquired/released before/after its employment even if
it's known that it should already be up and running.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
On USBHS, we cannot access the DWC2 register until VBUS is detected and
valid. Kernel event API is used to block if a valid VBUS signal is not
present when the user tries to force usbd_enable().
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The NUMDEVEPS field provides the number of endpoints in addition to the
control endpoint. It is used to iterate over GHWCFG1 register value to
get correct number of configured IN/OUT endpoints. To get it correctly,
we need to use it internally as number including control endpoint.
Interpretation of INEPS misses +1 because value 0 means 1 IN endpoint
and so on.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Although we can get the number of configured OUT and IN endpoints and
endpoint capabilities from the DWC GHWCFGn registers, we need to
configure the number of endpoint configuration structs at build time. On
some platforms, we cannot access the hardware register at pre-init, so
we use the GHWCFGn values from the devicetree to provide endpoint
capabilities. This can be considered a workaround, and we may change the
upper layer internals to avoid it in the future.
Also, add a new vendor quirk to fill in platform-specific controller
capabilities.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Rework and rename vendor quirks to better reflect where they intended to
be called. Number of quirks probably not final and will be trimmed
later.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Move most of the controller initialization to a separate function called
during udc_enable(). This allows us to add support for the platform
where the device controller is only available when VBUS is present and
the PHY is powered.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Should increment `ch.chan_idx` instead of `channel_idx`,
otherwise we will be stucked in the loop forever.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
While running the following command:
aplay ... | arecord ...
multiple times, it was discovered that the SAI transmit
FIFO goes into underrun. This only happened in the
beginning, a few BCLK cycles after unmasking the transmit
data line. With the following flow:
1) Trigger start on RX
a) Do TX and RX software reset
b) Enable RX FIFO error interrupt
c) Enable RX DMA requests
d) Enable receive data line
e) Enable transmitter
f) Enable receiver
..... some time has passed .....
2) Trigger start on TX
a) Enable DMA requests
b) Enable transmit data line
and configuration in mind:
1) RX is SYNC with TX
2) TX is ASYNC
3) Each FSYNC edge is 32-bit wide
4) Each frame contains 2 32-bit words
this points to the following possibilites:
1) The transmitter is enabled so close to the
start of a new frame that even though the DMA requests
are asserted, the DMAC doesn't have enough time
to service them until the module goes into underrun
=> the timing is bad.
2) The transmitter is enabled somewhat close to
the start of a new frame such that the DMAC is not
fast enough to service the module until it goes into
underrun => DMAC is too slow AND the timing is bad.
Although the exact cause was not pinpointed, this patch
aims to fix the problem by writing a frame's worth of 0s
in the transmit FIFO. This way, even if we're dealing with
scenario 1) or 2), the DMAC has plenty of time to perform
the transfer (i.e: a frame), thus avoiding the underrun.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The vbat driver requires the adc node to be enabled:
```c
.adc = DEVICE_DT_GET(DT_INST_IO_CHANNELS_CTLR(inst))
```
Update its Kconfig to depend on `DT_HAS_ST_STM32_ADC_ENABLED`,
which is the `"st,stm32-adc"` compat that all ST ADC bindings
include, this will guarantee that at least one ADC node is
enabled, but not necessarily the ADC used by the vbat node.
To make sure that it at least compiles, we init the `adc`
pointer only if the specified ADC node is enabled, otherwise
it will points to `NULL`.
Finally, check if the `adc` points to `NULL` in
`stm32_vbat_init`. We are not relying on the existing
`device_is_ready` check because `DEVICE_DT_GET` will not
return `NULL` if the ADC is enabled. `adc == NULL` means
that the ADC node is not enabled in the devicetree.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
We have already code using toolchain provided __get_cpuid(), clean up
apic_tsc and make it consistent with the rest of the code.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Use a structured channel specifier rather than a single enum when
specifying channels to read in the new read/decoder API.
Replaces usages of a seperate channel and channel_index parameter
where previously used with a struct sensor_chan_spec.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Rework CMD12 failure logic for SDHC SPI driver. Previously, the error
code of CMD12 was not checked, so even if CMD12 failed to send the
initial command would be retried. Change this behavior to retry CMD12
until it succeeds. If CMD12 fails, its error code will be propagated to
the caller. Otherwise, the return code from the command being sent by
the caller will be propagated.
Fixes#72365
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Properly release SPI bus on transmit error within the SDHC SPI driver.
In these cases return code is not checked, as we wish to return the
error code from the failed transfer to the SD stack.
Fixes#72364
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RC32K and RCX low power clocks require runtime calibration to work
correctly.
Frequency of those clock can differ from chip to chip, one constant
value from Kconfig may not be best when low power clock (sourced
from RCX or RC32K) is used for system tick.
This code modifies global z_clock_hw_cycles_per_sec variable that
is used when TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is enabled
in Kconfig.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This adds HCI driver which enables communication with CMAC core on
Renesas SmartBond DA1469x series. The CMAC core is running an Apache
NimBLE controller binary and uses shared memory for communcation via
mailboxes.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Add driver for TSic 206/306/316/506F/516/716 temperature sensor.
The driver uses PWM capture driver to read a single wire with
Manchester-like encoding.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Implement more robust handling for legacy SFDP tables, which may not
implement some of the JEDEC defined DWORDS for SFDP data. Instead of
failing to probe/initialize the flash when these DWORDS are not defined
in the basic flash parameter table, revert to sane defaults for SPI
flash.
Fixes#72051
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
`CONFIG_PM_DEVICE` being disabled does not mean that the `power-gpio`
does not need to be controlled.
Additionally, not having a `power-gpio` property does not mean that
power management is not supported, just that is has no work to do.
Signed-off-by: Jordan Yates <jordan@embeint.com>
In #72651, build fails due to conflict when enabling mbedTLS components.
Current Wi-Fi implementation for ESP32 can discard those selected cryptos.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The CDNS will report a M0 error if the data length is not what
it expects, but certain CCCs can have a variable length such as
GETMXDS and GETCAPS. This sets it up to ignore the M0 error if
it sees that ccc was GETMXDS or GETCAPS.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
GETSTATUS and GETMRL where not checking the right argc length. This
corrects it to check for the right count.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Misc fixes for the grtc timer driver:
* In non tickless mode:
* The tick time would drift a bit with each interrupt
* If something would cause a very significant delay
in handling the tick interrupt the number of announcements
would be incorrect
* Fortickless mode: The calculation of the next tick time
in sys_clock_set_timeout() was incorrectly done,
resulting in two spurious, too early, wakes of the kernel
before each correct wake. This caused tests/kernel/context/
to fail.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This puts the QSPI peripheral into memory-mapped mode when
CONFIG_STM32_MEMMAP is set. Writes and erase put it back into indirect
write mode.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This CONFIG_STM32_MEMMAP is for enabling the MemoryMapped mode
on external octo or quad spi memory.
In this case, the flash_stm32_read is done in mem map mode
the flash_stm32_erase is not available.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Check if the driver is suspended in gpio_keys_change_deferred(), this
avoids a potential situation where a race condition could try and read
from a pin that has just been disconnected.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
When a sensor that depends on an ADC is enabled in devicetree, enable
the ADC subsystem. ADC is roughly equivalent to a bus for these sensors
(the mechanism through which data is transferred), which had the same
conversion applied in #48707.
The same benefits apply here, namely removing the need for the following
pattern in board `.kconfig` files:
```
configdefault ADC
default y if SENSOR
```
Signed-off-by: Jordan Yates <jordan@embeint.com>
Some stm32 devices with quadspi (like stm32l47x or stm32l48x)
does not support Dual-Flash Mode. Avoid building error even if
the &quadspi node has a <flash-id> property defined.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Set the default initial bitrates globally via Kconfig. The initial bitrates
can still be overridden using the "bus-speed" and "bus-speed-data"
devicetree properties.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
RCAR MMC driver previously had to report inaccurate maximum supported
frequency to SD subsystem so that the subsystem would select SDR104 mode
timing. Remove this logic, as it should no longer be needed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
udc_init() only initializes and enables the USB regulator. This is
enough to detect VBUS changes, the USB controller is enabled in
udc_enable(). Deinitialization happens correspondingly in reverse order.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
For the simple events, do not check whether the device driver and stack
are marked as initialized. USB device notification will reschedule
delivery if the stack is not yet marked initialized.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Support regulator output different voltage as reference to LPADC
the regulator output voltage can be set through property
zephyr,vref-mv
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Remove nxp_ground_select property.
Delete the use of NXP vref peripheral CSR register REFL_GRL_SEL bit.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
According to API description, wdt_disable() shall
automatically uninstall all timeouts.
https://docs.zephyrproject.org/latest/hardware/peripherals/watchdog.html
Implement missing wdt_disable() functionality:
- disable WDT RR channels;
- remove callback from timeout channels;
- set data->m_allocated_channels to zero.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Expands driver to cover nRF54L15 features like AIN as GPIO configuration,
new reference voltage, different set of supported gain options.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
This commit should add all the functionality needed for the entropy
driver to work when PM is enabled.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
The val2 calculation was done using (1000000 / 40960) as
multiplying factor, which was sometimes leading to a
int32 overflow. So, let's use the equivalent (but smaller)
(3125 / 128).
Fix#46615
Signed-off-by: Armando Visconti <armando.visconti@st.com>
If no " character is found in buffer by esp_pull_quoted() it
returns -EAGAIN which causes a loop that never ends. This is because
the buffer dont get filled up with new data so no " chrachter will be
found. This commit changes esp_pull_quoted() to only return -EAGAIN,
so the buffer can get filled with new data and thus the loop can come
to an end.
Signed-off-by: John Johnson <john.filip.johnson@gmail.com>
Pass DIEPTXF address instead of value to sys_read32() to prevent bus
fault when debug logging is enabled.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Add a build-time assert for verifying that at least one of the supported
devicetree GPIO properties is present on each compatible devicetree node.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Introduce a XSPI driver to cover the common XSPI peripherals
of the stm32 mcu: X is for single or quad or octo or hexa
SPI bus access to external memories
DMA not supported in this version
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add driver, together with the corresponding dts binding and node in
the nRF54H20 SoC definiton, for the nRF temperature sensor that cannot
be accessed directly but only through nRF Services (nrfs) layer.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Force `\r\n` byte sequence for newline for the Xtensa simulator console
driver. This effectively mirrors the behavior of the UART console driver.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Be able to configure the clock frequency during runtime
using `i2c_configure()` and be able to use `i2c_get_config()`
of the i2c api for the esp32.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Fixes a bug where more than one thread trying to access
different PWM devices can cause erroneous behavior.
Co-authored-by: James Goppert <james.goppert@gmail.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Select that the STM32 driver has extended operations feature when
the FLASH_STM32_BLOCK_REGISTERS is set.
It allows using only block registers extended operation.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Some instances of the USDHC peripheral take longer to reset, and will
timeout with the previous delay of 100 cycles. Extend this delay to 1000
cycles to resolve this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove function for waiting for clock gate, as this is not used anywhere
within the USDHC driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Some USDHC IP instances do not have the voltage control bit present, as
they can only operate at 3.3V. Move code to select 1.8V mode into a
separate helper, and guard the call to UDSHC_SelectVoltage() behind a
feature macro from MCUX SDK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The CSI can connect to either a camera sensor (as on i.MX RT10xx) or
a MIPI CSI-2 receiver (as on i.MX RT11xx). To be generic, change the
naming from sensor to source.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Remove redundant `const` qualifiers in `struct modem_cellular_config` and
add `const` to the declaration to ensure the structure resides
in read-only memory (rodata).
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Instead of using floating point operations to compute the vref voltage,
it is possible to use the sensor_value_from_milli() function.
On a STM32G0, this saves 130 bytes of flash, excluding the FP library
needed on a FPU less MCU.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Instead of using floating point operations to compute the vbat voltage,
it is possible to do the computation using 32-bit variables by
reordering operations and using the sensor_value_from_milli() function.
On a STM32G0, this saves 140 bytes of flash, excluding the FP library
needed on a FPU less MCU.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit should add all the functionality needed for the DISPLAY
driver to work when PM is enabled.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
Add additional documentation and warnings around PXP usage. PXP rotation
is only intended to be used when framebuffers passed to the eLCDIF
display driver are equal in size to the screen.
Moreover, PXP rotation is flipped versus LVGL rotation. So a LVGL
rotation of 90 degrees requires the PXP to be set to rotate 270 degrees
to function as expected.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
FLEXSPI nor driver uses several LUTs for "scratch" commands during the
SFDP probe phase that are not needed once the flash is configured. Set a
second "end" marker we can use to configure the FLEXSPI MEMC driver, so
that we can indicate the true number of LUTs needed by this driver when
init is completed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not reset the FLEXSPI during init, as this will crash the chip if we
are running the MEMC driver in XIP mode.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for initializing the FLEXSPI when using a flash attached to
the FLEXSPI for XIP. This option is guarded behind a Kconfig, as
enabling it is dangerous and requires special care be taken by the user
to ensure that the configuration of pins and FLEXSPI settings will not
break support for reading the attached flash, as this will break XIP
support.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use custom initialization priority for FLEXSPI MEMC driver. This may be
needed when the MEMC driver must initialize before a flash driver, and
before another MEMC driver (for an attached device, like PSRAM)
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
When multiple devices are used, the FLEXSPI will place their address
spaces sequentially (based on the chip select port used). Additionally,
each device must use different sections of the FLEXSPI LUT table.
Fix the following calculation issues with multi-device usage:
- correct calculation of LUT sequence indices for AHB commands
- correctly add address and sequence offset when submitting FLEXSPI IP
transfer
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update documentation for flash_config memc function, to correctly
reflect usage of the "lut_count" parameter
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Correct a trivial bug and doxygen documentation error
in which data_bits was missused instead of stop_bits.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Signed-off-by: Mateusz Grzywacz <amateusz.grzywacz@gmail.com>
For DA1469x if PM config is selected PM_DEVICE must also
be selected for GPIO to work when device enters/exists
deep sleep.
Previously GPIO and regulator drivers selected PM_DEVICE
when PM was enabled.
Now it is moved to SOC instead.
PM_DEVICE selection in GPIO could result in circular dependency
for mcux if MEMC_MCUX_FLEXSPI (which is already dependent on PM_DEVICE)
was to be additionally dependent on GPIO.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
- If the peripheral is OTG_HS with ULPI, enable the OTG_HS ULPI clock
- The constant has a slightly different name on stm32h7
- Otherwise, if the peripheral is OTG_HS:
- Disable the OTG_HS ULPI clock in sleep/low power mode,
- If the peripheral is OTG_HS with PHYC[1], enable the PHYC clock.
- Otherwise, if the peripheral is OTG_FS[2] on stm32h7, also disable the
OTG_FS ULPI clock in sleep mode (in the device/ driver, this is done in
usb_dc_stm32_init()),
[1]: Internal HS PHY in stm32f7x2xx and (some) stm32f730xx
[2]: "OTG_FS" on stm32h7 is really just another OTG_HS peripheral, but
without any way to actually connect a HS PHY
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
DWC USB 2.0 HS OTG Controller sets USB Reset interrupt after Reset
signalling starts, but before the High-Speed Detection Handshake. This
allows software to perform most of the reset handling even before the
connection speed is known. The device controller indicates High-Speed
Detection Handshake result is available in DSTS register by setting
Enumeration Done interrupt.
USB stack expects that the connection speed is known immediately after
UDC_EVT_RESET is submitted. Due to this expectation, it is important to
submit UDC_EVT_RESET only after Enumeration Done interrupt to prevent
the USB stack from reading (and storing) actual device speed before
it is known.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Makes the update channels function optional, this is only
implemented in one driver so can be safely omitted from most
drivers
Signed-off-by: Jamie McCrae <spam@helper3000.net>
Checks that the supplied length is valid for the given driver
before passing it to the update function
Signed-off-by: Jamie McCrae <spam@helper3000.net>
The clk, dqs and ncs pins can be remapped between OSPI instances, but the
driver doesn't support it, yet. Therefore replace hard coded numbers to
device tree optional properties.
Signed-off-by: Samuel Kleiser <s.kleiser@vega.com>
Default priority set to Main Thread's and Stack-size set to 1KiB. This
should still allow for the System work-queue, considering this
Work-queue could be temporarily blocked on BT TX commands.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Stop relying on the system workqueue, as the BT TX APIs should
potentially block and now by design this will not work with the
Bluetooth Stack (for good reasons). Now the UART NUS driver has a
dedicated workqueue, which all NUS instances share.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Adapt the driver to verify if DMA buffers are located in noncacheable
memory when DCache is activated, in order to avoid cache coherency issues.
This is required until manual cache coherency management is implemented.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Two Kconfig symbols were tied to a board-specific DT nodelabel - namely
the `NRFX_UARTE_CONFIG_RX_CACHE_ENABLED` and `UART_<n>_RX_CACHE_SIZE`
were tied to `shared_ram3x_region` - but this is not necessary.
That DT node is where the UARTE driver RX/TX cache buffers are placed
in the default nRF54H20 DK memory map, but on another board, they could
be located somewhere else.
The exact memory sub-regions used for this purpose are indicated using
the `memory-regions` property on each UARTE instance, which should be
generic enough already, so let's use that instead.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
This patch fixes a compiler warning about the val being used
uninitialized. The previously present if check did not seem to satisfy
compiler. Hence the val is now explictly initialized.
Signed-off-by: Balaji Srinivasan <balaji.srinivasan@nordicsemi.no>
Use "const LL_TIM_OC_GetCompareCHx" & "const LL_TIM_IsEnabledIT_CCx" with
STM32G4X series, following changes in stm32cube:stm32g4xx:drivers:
include:stm32g4xx_ll_tim.h
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32G4X series, following changes in stm32cube:stm32g4xx:drivers:
include:stm32g4xx_ll_tim.h
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Use "const LL_DMA_IsActiveFlag_HTx", "const LL_DMA_IsActiveFlag_TEx",
"const LL_DMA_IsActiveFlag_TCx" and "const LL_DMA_IsActiveFlag_GIx" with
STM32G0X series, following changes in stm32cube:stm32g0xx:drivers:
include:stm32g0xx_ll_dma.h
Use "const LL_DMAMUX_IsActiveFlag_SOx","const LL_DMAMUX_IsActiveFlag_RGOx"
"const LL_DMAMUX_ClearFlag_SOx" and "const LL_DMAMUX_ClearFlag_RGOx" with
STM32G0X series, following changes in stm32cube:stm32g0xx:drivers:
include:stm32g0xx_ll_dmamux.h
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Use "const LL_TIM_OC_GetCompareCHx" & "const LL_TIM_IsEnabledIT_CCx" with
STM32F4X series, following changes in stm32cube:stm32f4xx:drivers:
include:stm32f4xx_ll_tim.h
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32F4X series, following changes in stm32cube:stm32f4xx:drivers:
include:stm32f4xx_ll_tim.h
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Definitions of fcntl flags are different between native libc and Zephyr. In
order to correctly map those values to the host, include Zephyr's fcntl.h
header, instead of the one bundled with libc.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
During a control read transfer host is able to start status stage as
soon as it receives last data packet. The time between last data packet
and status stage can be approximately 1 us at High-Speed and 8 us at
Full-Speed (exact timing depends on host but it is mostly constrained by
bus turnaround time).
With sufficient interrupt latency it is therefore possible that both
IEPINT (raised at end of Data Stage) and RXFLVL (raised at Status Stage)
would be set when dwc2 interrupt handler reads GINTSTS register. When
device is operating at High-Speed, the latency introduced by UART logger
backend is enough to trigger this condition. If the RXFLVL is handled
before IEPINT the stack will trigger "Cannot determine the next stage"
error.
Handle IEPINT before RXFLVL to make the handler immune to increased
interrupt latencies.
Co-authored-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The default value of IEEE802154_NRF5_DELAY_TRX_ACC Kconfig option is
based on a symbol that is undefined for nRF54H20. It evaluates as empty,
which leads to compilation errors with very cryptic logs.
This commit assures that a sane value for IEEE802154_NRF5_DELAY_TRX_ACC
is selected at all times, avoiding the compilation errors.
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
On STM32WBAX series, there is no bit in BCDR register to enable RTC.
Enabling RTC is done directly via the RCC APB register bit.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
This change allows to use DTR line driven from external serial port
that when active (low) will prevent UART device from going to sleep.
It will also wake up platform when DTR line becomes active.
DTR line is often activated in serial port connected to host computer
when operating system opens serial device like COMx for Windows
or /dev/ttyACMx /dev/ttyUSBx for Linux based systems.
DTR line (specified in device tree) will be used by WAKEUP and PDC
controllers (via GPIO driver) to handle DTR line changes.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This change allows to wake up UART from sleep mode when
low level on inactive UART is detected during platform sleep.
Timeout can be specified for each UART separately in device tree.
If one of the UARTs is selected as console sleep timeout is taken
from Kconfig same way other platform configure same functionality
using CONFIG_UART_CONSOLE_INPUT_EXPIRED_TIMEOUT
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This is initial version that implements device power
management support when configured in Kconfig files.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
The CSI should always propagate the get_fmt request down to the sensor.
It should not return a format by it own unless it contains a test
pattern generator inside it.
The problem with the legacy code is that this code snippet is never
reached if the sensor could return a format. In case the sensor failed
to return a format, these codes are reached but the returned format
makes no sense and its value was not initialized.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
The HAS_MCUX_CSI (as well as all the HAS_MCUX_XXX) config was obsolete
and has been replaced by the DT_HAS_NXP_IMX_CSI_ENABLED (i.e.
DT_HAS_XXX_ENABLED). Drop it as well as all the dependencies on it.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
check if top cb is null to avoid hard fault
top cb is allowed to be null in api so this is required
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit adapts the Ambiq flash controller to support the Apollo3
SOC (e.g. Apollo3 Blue, Apollo3 Blue Plus).
Also uses the Zephyr common IRQ API to replace the Ambiq HAL ones.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Bug in "enable/disable" argument parsing would cause
the oppostive of the requested setting to get
passed to active discharge API invocation.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Add RX packet validator where header, address, pid
and checksum bytes are verified and validated on
every functions.
Signed-off-by: Dinesh Kumar K <dinesh@linumiz.com>
1. Add functionality for upload and download fingerprint
template data of the R502A fingerprint sensor device.
2. change data type for data_len parameter of
transceive_packet function to uint16_t as it may hold
value 256 for dowload template data to sensor.
Signed-off-by: Dinesh Kumar K <dinesh@linumiz.com>
improvised uart tx and rx handler functions to handle
large chunk of fingerprint data from/to the sensor.
Signed-off-by: Dinesh Kumar K <dinesh@linumiz.com>
Removed fps_enroll, fps_search and fps_delete from
driver code, since they did application usage inside
driver. add the following attributes to achieve the
above functionality from application.
1. SENSOR_ATTR_R502A_CAPTURE
2. SENSOR_ATTR_R502A_TEMPLATE_CREATE
3. SENSOR_ATTR_R502A_RECORD_ADD
4. SENSOR_ATTR_R502A_RECORD_LOAD
5. SENSOR_ATTR_R502A_COMPARE
Signed-off-by: Dinesh Kumar K <dinesh@linumiz.com>
return -ENOENT; when no record found on getting
attribute SENSOR_ATTR_R502A_FIND and fix array indexing
for tx data in fps_search.
Signed-off-by: Dinesh Kumar K <dinesh@linumiz.com>
Only show the tmp112 runtime options when the tmp112 driver is enabled,
otherwise the option is confusing and does not appear hierarchically in
menuconfig.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The emulated GNSS driver behaves like a GNSS, implementing
device pm and the GNSS APIs, using only kernel features (
zephyr work queue and uptime) making it buildable on all
zephyr targets.
The purpose of this device driver is to tailor and validate
the gnss api test suite.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Previously only the upper/first 3 digits of a micro value
would be printed, dropping the last 3 digits. This could cause
misleading output for cmds like vlist.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Add mfd_adp5585 and gpio_adp5585 driver. This driver enables ADP5585
as an GPIO expander.
This chip is used as an GPIO expander on i.MX93 EVK. GPIO pinctrl,
read/write and interrupt is supported.
Note that ADP5585 has 2 GPIO banks with 5 pins each. The driver combines
two group into a 16-bit port. Index 0~4 correspond to R0~R4 lines, index
8~12 correspond to C0~C4 lines. Index 5~7 is reserved unavailable.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Check that the max-frequency DT property matches the
one provided by the nrfx HAL.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Instead of working it from a macro from the HAL
based on the DT address, let's just get the maximum
frequency directly from DT.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
4996a9be262ca81bae717bdd8c2939db2a6876b7 adds Target Support for the
Designware I2C Driver
But the change missed guarding some places with
CONFIG_I2C_TARGET
This commit fixes regressions caused by such change
Signed-off-by: Rafael Laya <rafael_laya97@hotmail.com>
Adds a direct_read subcommand to the I2C command.
Usage: I2C direct_read <device> <addr> [<nbytes>].
This command reads directly from the I2C device without first writing
a register address.
Signed-off-by: Eran Gal <erang@google.com>
Usage:
gpio toggle [device] [pin]
Also added Kconfig option so this command can be removed if
resources need to be conserved.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Make use of sensor_ug_to_ms2() and sensor_10udegrees_to_rad() APIs
to convert from raw values into proper units (i.e. m/s^2 for accel
and rad/s for gyro). It also improves measurement precision.
Fixes#63980
Signed-off-by: Armando Visconti <armando.visconti@st.com>
KSOL and KSOH1 registers are used not only by the kbd driver, but
potentially by other GPIOs attached to the keyboard scanning pins. Mask
write access to those registers to ensure drivers don't step over each
other.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix the range check for col_size to allow a configuration with less than
16 columns. Not sure why the minimum was set so high but there's no
reason I can tell for it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Argument to FIELD_GET macro was mixed up resulting in
incorrect values being reported for voltage and current
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
The code currently clamps timeout length so not to overflow the computed
cycle difference variable or the sys_clock_announce() argument's range.
But this completely fails to take into account the case where two
successive timeouts with enough time between them will still overflow the
cycle difference and/or the tick count.
Fix this by clamping the actual number of cycles to wait for based on
the previous report occurrence rather than clamping the timeout ticks.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
In commit 6068255512 ("drivers/timer/arm_arch_timer: Fix cycles
overflow with GDB stub") an extra TO_CYCLE_DIFF() macro was introduced
to bypass the cycle_diff_t type cast in some cases.
The actual fix consists in defining that type properly in the first
place. That's the very reason why such type was abstracted.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
There are two issues being fixed here:
1) The code currently clamps timeout length so not to overflow the
computed cycle difference variable or the sys_clock_announce()
argument's range. But this completely fails to take into account
the case where two successive timeouts with enough time between them
will still overflow the cycle difference and/or the tick count.
2) If a timeout with K_TICKS_FOREVER is provided then the comparator is
set with UINT64_MAX which is bogus. Not only this value doesn't make
much sense in the context of a running cycle counter, but it also
opens the possibility for the same cycle diff and/or ticks overflow
as above.
Fix both of those by clamping the actual number of cycles to wait for
based on the previous report occurrence rather than clamping the timeout
ticks.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add driver for IS66WVQ8M4 PSRAM, using the MCUX FlexSPI interface to
write data to the PSRAM device.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Some instances of the FlexSPI IP support a different clock source being
used for port B of the FlexSPI instance. Add a devicetree property and
driver support to enable configuring this property of the hardware.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Apollo3 SoCs have different UART register design compared with
that of Apollo4 SoCs, we need to change the offset and mask for
the power status check
Signed-off-by: Hao Luo <hluo@ambiq.com>
The `BT_DEBUG_*` Kconfig symbols have been deprecated for more than 2
versions, remove them.
Update code that was still using them.
Remove the Bluetooth specific `Kconfig.template.log_config_bt` and use
`Kconfig.template.log_config_inherit` from the logging subsystem
instead, now that the legacy symbols can be removed.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Add support for similar adin1100 phy, boath are 10Base-T1L,
only difference is that adin1100 connects through r/mii.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Use PHY apis to access the PHY, to avoid any kind of collisions
with other tasks using the PHY apis.
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
MDIO is part of the ETH IP, but some phy chip may need a
specific phy driver to set up certain vendor registers enabling
particular features.
Add support for stm32 mdio access.
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
In previous generations, each MCLK divider could be enabled separately.
Starting with ACE, there is a single-bit MDE field to enable a single
divider. The existing code would not enable MDE in case MCLK1 is used.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Adds the necessary defines with init, dial and periodic chat scripts to
support the Sequans GM02S Modem.
Modification to cxreg handler to process GM02S +CEREG response.
Signed-off-by: Thibo Verheyde <thibo@dptechnics.com>
Intial driver adding intial script to receive only GGA, RMC and GSV
NMEA messages, configuring fix rate, setting enabled system and adding
power management with the module on-off pin.
Signed-off-by: Jeronimo Agullo <jeronimoagullo97@gmail.com>
This commit should add all the functionality needed for the MIPI DBI
driver to work when PM is enabled.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
When there is no implementation for a particular hardware information
device, the API return -ENOSYS, while the hardware information shell
checks for -ENOTSUP. This returns a non-user friendly message:
uart:~$ hwinfo devid
Error: -88
The API can't be changed easily without breaking things, so let's change
the shell instead. This gives:
uart:~$ hwinfo devid
Not supported by hardware
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
When SSP is consumer for FS and BCLK then it does not needs MCLK as the
shifting and rate is derived form the I2S bus directly.
When SSP provides FS only then the BCLK setup is not needed.
When SSP provides BCLK only then both MCLK and BCLK setup is needed.
In hardware multiple SSPs share the same MCLK source, in case of one
SSP port is used as clock provider while other is used as clock consumer
then the consumer SSP should not need to depend on the provider SSP
configuration, the ports can run in different clock rates.
In this example the consumer SSP should not try to configure and lock the
MCLK frequency to some arbitrary rate (as it does not need MCLK at all)
which might be different than the frequency needed by the provider port.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Spell checking tools do not recognize "iff", replace with "if and only if".
See https://en.wikipedia.org/wiki/If_and_only_if
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Since the interrupt state of the IA bit (interrupt source register) is
checked, it needs to be read out everytime, not only on latching.
Fixes#71245
Signed-off-by: Juliane Schulze <juliane.schulze@deveritec.com>
