drivers: serial: pl011: Add support for Ambiq Apollo3 SoCs UART

Apollo3 SoCs have different UART register design compared with
that of Apollo4 SoCs, we need to change the offset and mask for
the power status check

Signed-off-by: Hao Luo <hluo@ambiq.com>
This commit is contained in:
Hao Luo 2023-12-19 12:16:15 +08:00 committed by Carles Cufí
commit 3c1fd19d96

View file

@ -54,17 +54,17 @@ static inline int clk_enable_ambiq_uart(const struct device *dev, uint32_t clk)
* Solution: Check device's power status to ensure that register has taken effective.
* Note: busy wait is not allowed to use here due to UART is initiated before timer starts.
*/
#define AMBIQ_UART_DEFINE(n) \
#if defined(CONFIG_SOC_SERIES_APOLLO3X)
#define DEVPWRSTATUS_OFFSET 0x10
#define HCPA_MASK 0x4
#define AMBIQ_UART_DEFINE(n) \
static int pwr_on_ambiq_uart_##n(void) \
{ \
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
uint32_t pwr_status_addr = addr + 4; \
uint32_t pwr_status_addr = addr + DEVPWRSTATUS_OFFSET; \
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
while ((sys_read32(pwr_status_addr) & DT_INST_PHA(n, ambiq_pwrcfg, mask)) != \
DT_INST_PHA(n, ambiq_pwrcfg, mask)) { \
arch_nop(); \
while (!(sys_read32(pwr_status_addr) & HCPA_MASK)) { \
}; \
return 0; \
} \
@ -72,5 +72,24 @@ static inline int clk_enable_ambiq_uart(const struct device *dev, uint32_t clk)
{ \
return clk_enable_ambiq_uart(dev, clk); \
}
#else
#define DEVPWRSTATUS_OFFSET 0x4
#define AMBIQ_UART_DEFINE(n) \
static int pwr_on_ambiq_uart_##n(void) \
{ \
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
uint32_t pwr_status_addr = addr + DEVPWRSTATUS_OFFSET; \
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
while ((sys_read32(pwr_status_addr) & DT_INST_PHA(n, ambiq_pwrcfg, mask)) != \
DT_INST_PHA(n, ambiq_pwrcfg, mask)) { \
}; \
return 0; \
} \
static inline int clk_enable_ambiq_uart_##n(const struct device *dev, uint32_t clk) \
{ \
return clk_enable_ambiq_uart(dev, clk); \
}
#endif
#endif /* ZEPHYR_DRIVERS_SERIAL_UART_PL011_AMBIQ_H_ */