Exact

Exact Union RegExp

Camille BAUD 9ea48bd453 arch: riscv: Allow decoding unaligned FP instruction in FP no-MTVAL trap ... Load the instruction byte per byte to avoid an unaligned access exception Signed-off-by: Camille BAUD <mail@massdriver.space>		2026-05-22 18:26:16 +02:00
..
arc	soc: arch: select SCHED_IPI_SUPPORTED if SMP	2026-04-14 22:31:16 -04:00
arm	llext: arm: Restrict llext veneer support to Mainline cores.	2026-05-21 17:04:24 -04:00
arm64	arch: Add support for dts RAM configuration	2026-05-11 08:45:38 +02:00
common	acpi: break on zero-length subtable in MADT and DMAR entry iterators	2026-05-22 10:51:33 +02:00
mips	libc: common: rename _k_neg_eagain to _errno_neg_eagain	2026-05-01 11:16:31 -05:00
openrisc	arch: openrisc: only compile irq_offload when enabled	2026-04-14 22:34:23 -04:00
posix	nsi: move nsos_fcntl to more generic nsi_fcntl	2026-04-17 10:40:50 +02:00
riscv	arch: riscv: Allow decoding unaligned FP instruction in FP no-MTVAL trap	2026-05-22 18:26:16 +02:00
rx	soc: Add FPU config for RXv2 and RXv3	2026-03-19 15:27:18 +09:00
sparc	llext: add CONFIG_LLEXT_CUSTOM_HEAP_PLACEMENT	2026-04-18 12:37:46 -04:00
x86	arch/x86: mmu: support LRU eviction algorithm for demand paging	2026-05-12 22:16:56 +02:00
xtensa	xtensa: unsupported unsigned load / store emulation	2026-05-21 17:00:57 -04:00
archs.yml	arch: drop Synopsis / Designware from ARC's full name	2026-04-14 10:37:34 -05:00
CMakeLists.txt	cmake: enable -Wshadow partially for in-tree code	2023-08-22 11:39:58 +02:00
Kconfig	arch: riscv: skip ATOMIC_OPERATIONS_C if arch-specific atomics are enabled	2026-05-22 10:44:26 +02:00