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zephyr/arch/riscv
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Carlo Caione 43a61329cc riscv: Allow SOC to override arch_irq_{lock,unlock,unlocked} 
RISC-V has a modular design. Some hardware with a custom interrupt
controller needs a bit more work to lock / unlock IRQs.

Account for this hardware by introducing a set of new
z_soc_irq_* functions that can override the default behaviour.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-01-09 19:21:39 +01:00
..
core riscv: Add support for hardware stacking / unstacking 2023-01-09 10:15:07 +01:00
include riscv: Introduce RISCV_ALWAYS_SWITCH_THROUGH_ECALL 2022-07-04 18:18:10 +02:00
CMakeLists.txt riscv: toolchain arguments for a 64-bit build 2019-08-09 09:11:45 -05:00
Kconfig riscv: Allow SOC to override arch_irq_{lock,unlock,unlocked} 2023-01-09 19:21:39 +01:00
Kconfig.core riscv: Introduce Zicsr and Zifencei extensions 2022-08-29 16:57:18 +02:00
Kconfig.isa riscv: Introduce BitManip extensions 2022-08-29 16:57:18 +02:00