zephyr/arch/arm
Adam Szczygieł f4747547d9 arch: ISR table size optimization
Allow to use a switch-case instead of an array holding ISR entries.

When most of IRQs are not used, they share the same, default entry.
It results in most of the ISR array entries being identical duplicates.

This change allows to use dynamically generated function (after first
linker pass) that uses switch-case instead of a full array.
Default entries are handled only once, in a default section.
Used IRQs have their own case sections.
This can help reduce binary size.

Signed-off-by: Adam Szczygieł <adam.szczygiel@nordicsemi.no>
2026-04-17 12:35:34 +01:00
..
core arch: ISR table size optimization 2026-04-17 12:35:34 +01:00
include arch/arm: Remove unused Cortex M thread struct elements 2026-03-10 17:24:10 +01:00
CMakeLists.txt arch: arm: cmake: Correct endian in output format 2024-07-04 18:01:51 -04:00
Kconfig arch: arm: core: add Kconfig and CMakeLists.txt for ARM9 support 2026-03-23 12:27:55 -05:00