Commit graph

136,983 commits

Author SHA1 Message Date
Khai Cao
0808d56d96 samples: subsys: ipc: openamp: Add support for ek_ra8m2
Add support sample app openamp for Renesas ek_ra8m2

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
483218c6ea soc: renesas: ra: Add Kconfig.sysbuild for second-core launcher
Add Kconfig.sysbuild for second-core launcher

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
8832d196cf tests: drivers: mbox: Add support mbox_data for ek_ra8m2
Add support mbox_data for ek_ra8m2

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
b41405b0bb tests: drivers: counter: Add test support for ek_ra8m2 cm33
Add support for test app ``counter_basic_api`` on Renesas ek_ra8m2 cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
f8d21fe2cf samples: drivers: counter: Add support alarm for ek_ra8m2 cm33
Add support sample ``alarm`` for Renesas ek_ra8m2 cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
fe50f85e6d tests: drivers: comparator: Add support gpio_loopback for ek_ra8m2 cm33
Add support test app ``gpio_loopback`` for Renesas ek_ra8m2 cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
db5552b225 tests: drivers: pwm: Add support pwm tests for ek_ra8m2 cm33
Add support test app ``pwm_api`` and ``pwm_loopback`` for
Renesas ek_ra8m2 cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
d8a7385eb6 tests: drivers: spi: Add support spi_loopback for ek_ra8m2 cm33
Add support test app ``spi_loopback`` for Renesas ek_ra8m2 cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
532fcc9b83 tests: drivers: i2c: Add support i2c_api for ek_ra8m2 cm33
Add support test app ``i2c_api`` for Renesas ek_ra8d2 cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
e202755f40 tests: drivers: uart: Add support uart_async_api for ek_ra8m2 cm33
Add support test app ``uart_async_api`` for Renesas ek_ra8m2 cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
ad07b0fe7a boards: renesas: Add support for Renesas ek_ra8m2 cm33
Add support for Renesas ek_ra8m2 cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Khai Cao
14a53abd65 dts: arm: renesas: ra: Add support for Renesas r7ka8m2jflcac_cm33
Add support for Renesas r7ka8m2jflcac_cm33

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
2026-03-16 12:32:21 +01:00
Julian Paul
64a7ee6b58 drivers: ethernet: phy: microchip_t1s: optional plca_node_count
Plca nodes with node_id not 0 do not manage transmit windows and
should therefore not be required to provide plca_node_count.
This change makes plca_node_count optional for (node_id != 0)
and if omitted sets the default value to 0.
The behaviour for node with id 0 stays the same.

Signed-off-by: Julian Paul <julian.paul@siemens.com>
2026-03-16 12:31:42 +01:00
Eric Mechin
483d216202 drivers: stm32wba: hci_stm32wba.c: Kconfig Options support
With stm32wba_set_stack_options function call set
the BLE stack Options flags initialization according
to the zephyr Kconfig options.

Signed-off-by: Eric Mechin <eric.mechin@st.com>
2026-03-16 12:31:08 +01:00
Aaron Ye
40d88a03b3 manifest: update hal_ambiq revision
Update HAL for mainly the Apollo3 timer HAL changes.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2026-03-16 12:30:27 +01:00
Sven Ginka
4eb4dfdd35 drivers: spi: soc sy1xx - fix bit-len
This commit fixes the bit-len field for the uDMA transfer.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2026-03-16 12:30:08 +01:00
The Nguyen
718d9ac57a tests: drivers: video: add test support for aik_ra8d1
Add video test_pattern support for aik_ra8d1

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2026-03-16 12:29:33 +01:00
The Nguyen
12e0edfd80 tests: drivers: display: add aik_ra8d1 test support
Add minimal test support for aik_ra8d1 board

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2026-03-16 12:29:33 +01:00
The Nguyen
2bcbc75845 tests: drivers: i2c: add test support for aik_ra8d1
Add minimal test for aik_ra8d1 i2c running on iic HWIP

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2026-03-16 12:29:33 +01:00
The Nguyen
d918893234 tests: drivers: spi: enable aik_ra8d1 test
Enable the SPI driver test on aik_ra8d1

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2026-03-16 12:29:33 +01:00
The Nguyen
71f0f39da0 boards: shields: add renesas_aik_ov2640_cam support
Add support for the Renesas AI Kit camera module

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2026-03-16 12:29:33 +01:00
The Nguyen
679d52a153 shields: rtkmipilcdb00000be: support aik_ra8d1
Support building rtkmipilcdb00000be with aik_ra8d1

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2026-03-16 12:29:33 +01:00
The Nguyen
cf2823cf61 boards: renesas: initial support for AIK-RA8D1
Add Renesas AIK-RA8D1 board support

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2026-03-16 12:29:33 +01:00
Guillaume Gautier
c40af072cb samples: drivers: adc: stream: add overlay for nucleo_h753zi
Add an overlay for the Nucleo H753ZI board.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-16 12:28:34 +01:00
Guillaume Gautier
40d8c44129 samples: drivers: adc: stream: add multi channel support
Complete the ADC stream sample to add support for multiple ADC channels.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-16 12:28:34 +01:00
Guillaume Gautier
872b423b63 drivers: adc: stm32: add rtio support
Add RTIO support for the STM32 ADC driver to be able to stream data
continuously.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-16 12:28:34 +01:00
Alain Volmat
dd2473487e tests: display: display_check: add st_b_dsi_mb1314 shield
Addition of tests with the st_b_dsi_mb1314 shield.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
095eebba83 boards: shields: add st_b_dsi_mb1314 shield (DSI display)
Addition of a new shield which embeds a round DSI display
using a G1120TB103GF-001 390x390 pixels panel with a
RM67162 controller.
This shield enables it via usage of the LTDC and DSI
of the STM32.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
b15c4c58e2 boards: st: add DSI connector and display alias in stm32l4r9i_disco
Add the description of the DSI connector available on
the stm32l4r9i_disco board and zephyr_mipi_dsi/zephyr_lcd_controller
alias to be used by display shields.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
a5b06ef45d dts: arm: stm32l4: add ltdc in stm32l4p5 and stm32l4q5
ltdc controller is also available in stm32l4r5 and stm32l4q5
so add it within stm32l4p5.  It is not available in stm32l4r5
hence delete the node for this platform.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
638e6f8117 dts: st: l4: stm32l4r9: addition of mipi_dsi node
stm32l4r9 series embeds a MIPI DSI controller which uses the
LTDC controller as input.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
15d03e6aef drivers: clock_control: fix STM32L4 PLLSAI2 handling
In the transition to new PLLSAI bindings, part of the
previous symbols are remaining, especially STM32_PLLSAI2_DIVR_DIVISOR
which is used to compute the clock rate and leads to division by
zero when checking the clock rate.

Fix the remaining PLLSAI2_DIVR parts in order to allow proper
behavior of the PLLSAI2 on STM32L4.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
1c23e896a3 dt-bindings: clock: stm32l4/l5: add PLLSAI doxygen comments
Add doxygen comments regarding PLLSAI clock source bindings
on STM32L4 and STM32L5.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
36ed1b4dcc dt-bindings: clock: stm32l5: removal of PLLSAI2 Q / R / DIVR
The stm32l5 PLLSAI2 has only a single output which is the P
output used for SAI1 or SAI2 peripherals.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
41dd76d14d dt-bindings: clock: stm32l4: addition of HSE clock source
Addition of the STM32_SRC_HSE define in stm32l4_clock.h in
order to be able to address the HSE clock source from the
device-tree.
Add doxygen comments regarding fixed clock sources.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
d68986ad85 drivers: display: rm67162: allow usage in VIDEO mode
Add VIDEO related mode_flags whenever performing mipi_attach
and ensure that default column and page address configuration
are done.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Alain Volmat
fd9c191316 display: stm32_ltdc: use DISPLAY_BITS_PER_PIXEL to compute format BPP
Use the macro DISPLAY_BITS_PER_PIXEL in order to compute each format
BPP and thus avoid requiring each format BPP written within the
driver.
Thanks to that, simply the function stm32_ltdc_set_pixel_format to
avoid code duplication.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2026-03-16 12:27:44 +01:00
Carlo Caione
716e4c0d89 drivers: lora: add receive duty cycle (wake-on-radio) API
Add lora_recv_duty_cycle() for hardware-driven RX duty cycling. The
radio autonomously alternates between sleep and listening for a LoRa
preamble, with no MCU involvement. On packet reception, the provided
callback is invoked.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2026-03-16 12:25:23 +01:00
Carlo Caione
7e9232be30 drivers: lora: add CAD support to LoRa API
Add two standalone CAD functions:
- lora_cad() (blocking) and
- lora_cad_async() (callback-based).

CAD parameters (symbol_num, det_peak, det_min) and a cad_mode field are
embedded directly in struct lora_modem_config.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2026-03-16 12:25:23 +01:00
Christophe Guibout
aeaf63926f boards: st: add support for stm32mp215f_dk board
Introduce initial board support for the STM32MP215F-DK Discovery Kit.
It includes:
- Board metadata (board.yml, stm32mp215f_dk.yaml)
- Base software configuration (Kconfig.stm32mp215f_dk)
- CMake build integration (board.cmake)
- Default configuration (stm32mp215f_dk_stm32mp215fxx_m33_defconfig)
- Minimal device tree (stm32mp215f_dk_stm32mp215fxx_m33.dts)
- Initial documentation and picture for the stm32mp215f_dk board
- Also rename stm32mp257f SoC name to be able to handle stm32mp215f

Signed-off-by: Christophe Guibout <christophe.guibout@st.com>
2026-03-16 12:24:52 +01:00
Christophe Guibout
e10ec05ea6 boards: st: enable gpios at SoC level instead of board level
As done with ST MCU boards, enable all gpios at SoC level to avoid
to handle them at board level.

Signed-off-by: Christophe Guibout <christophe.guibout@st.com>
2026-03-16 12:24:52 +01:00
Christophe Guibout
089abb3250 dts: arm: st: add support for stm32mp21x
Add the stm32mp21x initial device tree source based on stm32mp2_m33.dtsi
stm32mp21 series boards, covering non-secure configuration for zephyr on
the Cortex-M33 core.
These files provide the basic hardware description, including CPU
(Cortex-M33), memory, and RCC clock controller.

Also factorize stm32mp2_m33.dtsi where some definitions were only dedicated
to stm32mp25x, split IRQ number declaration which are different
between stm32mp25x and stm32mp21x.

Signed-off-by: Christophe Guibout <christophe.guibout@st.com>
2026-03-16 12:24:52 +01:00
Christophe Guibout
bb540e6278 drivers: clock_control: stm32: enable code if status okay in dt
As stm32mp215fxx SoC supports less peripherals than stm32mp257fxx,
some definitions are not available in the HAL. To avoid compilation
issues, put these definitions depending on their activation in the DT.

Signed-off-by: Christophe Guibout <christophe.guibout@st.com>
2026-03-16 12:24:52 +01:00
Christophe Guibout
55b0ebf0df soc: st: add support for stm32mp215f
Add stm32mp215f SoC variants that are close to stm32mp25x with
less features but with optimized power consumption:
- rework SOC management to handle both stm32mp25x and stm32mp21x
- Fix NUM_IRQS where last usable IRQ is 311
- Factorize Kconfig

Signed-off-by: Christophe Guibout <christophe.guibout@st.com>
2026-03-16 12:24:52 +01:00
Abderrahmane JARMOUNI
6fe77b9364 drivers: display: Add API for handling events externally
Introduce a callback-based event API that supports handling several
display-related events outisde a display controller driver.
It offers both ISR and thread delivery modes.
Event mask is available at registration so the driver can minimize ISR
overhead, & the caller only receives callbacks for relevant events.
A handle is used to tie a registration to its owner which provides safe
unregister semantics.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2026-03-16 12:23:25 +01:00
Phi Bang Nguyen
48855fbf37 tests: drivers: video: Fix test_video_format
video_get_caps() needs a specified type. Fix it.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2026-03-16 12:22:32 +01:00
Phi Bang Nguyen
c916a4a141 include: drivers: video: Use uint16 for buffer index
The buffer index is to track the buffers in the whole video buffer pool
which may be used for several video pipeline, each can use up to an
uint8 buffer. Extend the type to uint16 to account for this fact.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2026-03-16 12:22:32 +01:00
Phi Bang Nguyen
bb2e0ac8c9 include: drivers: video: Explicitly assign values to video_buf_type
Explicitly initialize video_buf_type enum to avoid overlap with
zero-initialized memory and prevent accidentally adding new types
before, after or in-between those ones.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2026-03-16 12:22:32 +01:00
Phi Bang Nguyen
5e51280b07 drivers: video: video_common: Drop mem_block structure
The mem_block structure and the video_block array are not needed.
Drop them.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2026-03-16 12:22:32 +01:00
Phi Bang Nguyen
1a74f9b50e drivers: video: ov5640: Expose the high framerates first
Expose the high framerates first so that it can be listed first and
chosen as the default frame rate in some applications.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2026-03-16 12:22:32 +01:00