The LTK should not be generated from BR link key if there is a LTK
exists and BR LK is weaker.
Do not drive LTK from BR LK in the case.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
- Make sure the align-and-rewind feature is explicitly tested.
- Add sub-unit allocations to the mix.
- Rely on some heap internal facilities to determine heap boundaries
(32- vs 64-bit builds do cause a difference).
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Clarify that all max limit on RTOS objects set by Kconfig only apply
to objects whose control blocks were dynamically allocated. The
CMSIS-RTOSv2 impl layer itself does not restrict the number of
statically created RTOS objects.
Signed-off-by: Utsav Munendra <utsavm@meta.com>
Clarify thread Kconfigs to denote the maximum number of dynamically
allocated control blocks and stacks for threads. Allow application to
create any number of threads with statically allocated control block
and stack.
Signed-off-by: Utsav Munendra <utsavm@meta.com>
Introduces the Z_IS_TIMEOUT_RELATIVE() macro to help ensure that
checking for relative/absolute timeouts is consistent. Using this
macro also helps ensure that we get the correct behavior when using
32-bit timeouts (CONFIG_TIMEOUT_64BIT=n).
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Previously, the arch_icache_invd_range function simply returned
-ENOTSUP for Cortex A/R. However, this causes a correctness issue when
the processor modifies memory and then executes it as instructions, like
the LLEXT subsystem does. The CPU might not see the up-to-date instructions
in memory.
This caused an LLEXT test failure when running on an emulated Cortex-R5
in QEMU with caches enabled. QEMU doesn't actually emulate the cache,
but it does seem to need the ISB barrier that is executed as part of the
cache invalidate operation in order to handle self-modifying code
properly.
These CPUs do in fact support a selective I-cache invalidate operation
(ICIMVAU) but the CMSIS library doesn't currently support it. For now,
just invalidate the entire I-cache when an icache_invd_range operation
is performed.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
On ZynqMP, the RPU Cortex-R5 cores come up by default without
instruction and data caches enabled. Enable them as part of
soc_early_init_hook when CONFIG_CACHE_MANAGEMENT is enabled.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Removed nested spinlock acquisition in i2c_xilinx_axi_write to prevent
ztest failures due to invalid spinlock usage.
Ensured spinlocks are not consecutively acquired without unlocking,
preventing potential deadlocks.
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Remove check for changed files for now until we have a better way to do
that without the 3rd party action.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The following board revision properties can now be used as part
of the format string in the 'west boards -f ...' command.
- board.revisions with format {revisions}
- board.revision_default with format {revision_default}
Signed-off-by: Alex Fabre <alex.fabre@rtone.fr>
Added tests in order to verify the functionality of the
newly added fatfs fstab integration.
Signed-off-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
Co-authored-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
Co-authored-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
In order to use fstab with fatfs in addition to
littlefs a new driver fstab,fatfs was introduced
containing the required logic to detect and if
needed automount fatfs devices specified in fstab.
Additionally as the partition phandle is not needed
by fatfs and currently is specific to littlefs it
was moved from the common dts binding into the
littlefs binding.
Signed-off-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
Co-authored-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
Co-authored-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
This driver had some issues with interrupt-driven operation, which
manifested by the console breaking when enabling the Zephyr shell on the
kv260_r5 target for example. Fixed the following:
-Ensure device is fully hardware reset during initialization
-Changed poll_out to be more consistent with other drivers, i.e. only
wait for the UART to accept the character, not for it to be fully
transmitted.
-Added implementation for err_check function, as otherwise there was no
way to detect or clear the error interrupts enabled by irq_err_enable.
-Fixed logic for enabling/disabling interrupts. This should only be done
by explicit enable/disable calls, not as part of fifo_fill etc.
-This hardware does not produce interrupts for TX FIFO empty or RX FIFO
threshold when enabling them if the TX FIFO is already empty or RX FIFO
already contains data. When enabling interrupts in these cases, use a
timer to trigger a user callback to match the normal UART API usage,
similar to the xlnx_uartlite driver.
-Other minor cleanups to interrupt-driven functions.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reset the watchdog back to the initial state before enabling the
expiry interrupt. This prevents the watchdog expiring immediately if
there is a long gap between `wdt_install_timeout` and `wdt_setup`.
Signed-off-by: Jordan Yates <jordan@embeint.com>
- The current code will cause stall if some other subsystem (like subg)
also needs to manage pm states.
- So add a check to only re-enable suspend if it was disabled by PWM.
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Seemed to be a typo in the Rust doc page saying to enable CMake support
in your CMakeLists.txt. Swapped to say Rust.
Signed-off-by: Michael Feist <michael.feist@etcconnect.com>
Ifdef guard of CONFIG_SYS_HEAP_RUNTIME_STATS prevents using IS_ENABLED
macro, preferred way of guarding code. This commit fixes that by
removing ifdef macro.
Signed-off-by: Evgenii Kosenko <Evgenii.Kosenko@silabs.com>
Documentation comments describes sys_heap_runtime_stats_get function to
have stats_t argument, hoever function has stats. The commit fixes typo
introduces in a71cd8790f
Signed-off-by: Evgenii Kosenko <Evgenii.Kosenko@silabs.com>
Guard the neorv32_uart_config_get() function to avoid compilation warning
with CONFIG_UART_USE_RUNTIME_CONFIGURE=n.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This patch will set MMU permissions for .cold* sections
Fixes cold section execution if MMU is enabled
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Improve naming of the scheduler and call it what it is: simple. Using
'dumb' for the default scheduler algorithm in Zephyr is a bad idea.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The ke17z overlay for this test is incorrect in that the chip select
line sent to the spi pins on the header is PCS1, not PCS0. This is
having no functional effect on the test right now but soon I am trying
to implement a chip select test, and regardless it helps to have the CS
actually toggle right now for debugging purposes.
Also, I checked the frdm_ke17z512 and it looks like the board pinctrl
file is configuring for PCS2, so I fixed that as well because it looks
also like the same mistake, but I don't have that hardware.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
A few option defaults that were so far defined in the board _defconfig
files are actually entirely SoC family (nRF54L) dependant, so it makes
much more sense to have them defined at the SoC family level in order
for all boards based on these SoCs to automatically inherit them.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
When CONFIG_KERNEL_COHERENCE is enabled, pend_locked() asserts
when wait_q is not in coherent memory. The k_pipes used in
the pipe_api tests are declared locally within the test. They
are located within the thread stacks and those wait_q inside
k_pipe struct are thus not considered in coherent memory.
To make them work, replace the local ones with a global
k_pipe object. Since each test initializes the pipe object
locally, the tests are not functionally changed.
Fixes#84235
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The zbus hlp_priority_boost test requires thread priority
boosting. If it is running SMP, it is possible that
the message has already been processed before the check
for priority boosting is done, thus failing the test.
So change the test to use 1 CPU only.
Fixes#79197
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Currently, coex application is enable the mbedtls and PAS feature,
this causes BT_LONG_WQ thread to use more stack size.
Signed-off-by: Author You <author.you@nxp.com>
There is a bug here clearly which is that if there is some error in the
transceive function, it returns without releasing the context.
This should be fixed by properly handling the errors with a context release
before returning.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
For multi-byte word, there is clearly a bug in that the same byte is
written to each spot in the word instead of writing all the bytes
properly.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The part numbers for MCXC141VLH and MCXC142VFM
have all been set to MCXC141VFM, which lead to
build errors.
Signed-off-by: Maximilian Werner <maximilian.werner96@gmail.com>
Add calibration via a known gas concentration. This is the recommended way
of calibrating the sensor according to the datasheet.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
The LED on the FRDM-RW612 is currently configured incorrectly. It should
be set as GPIO_ACTIVE_LOW
Signed-off-by: Thorsten Klein <thorsten.klein@bshg.com>
Some SDMA scripts (e.g multi-fifo) updates the buffer descriptor
count field after a transfer is complete.
Re-initialize the buffer descriptor to point to the correct
transfer size for the next transfer.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
With PDM device NXP HAL uses multi-fifo script. In order
for this script to properly work we need to initialize
multi fifo and SW done configuration.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Remove the overlay files for many of the NXP platforms, because they
were doing two things that are no longer relevant:
1) CONFIG_SPI_ASYNC=n -> LPSPI driver used to not work with
CONFIG_SPI_ASYNC, now it does, so we should test it.
2) CONFIG_SPI_MCUX_LPSPI_DMA=y -> This is redundant with the
testcase.yaml
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
