Commit graph

99,250 commits

Author SHA1 Message Date
Christopher Friedt
3650537a9d cmake: calculate the md5 sum using the built-in string command
Assuming that all supported releases require at least CMake
version 3.0, we should be able to calculate the md5sum in a
much simpler way using string().
https://cmake.org/cmake/help/v3.0/command/string.html

This avoids writing a temporary file into the source directory
and therefore mitigates the possibility of the following
warning.

share/zephyr-package/cmake/zephyr_export.cmake:19 (string):
  string sub-command SUBSTRING requires four arguments.

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-12-12 10:56:06 +01:00
Francois Ramu
bf2b4675d0 samples: boards: stm32 low power blinky for stm32 boards
Set the prescaler for the stm32_lp_tick_source lptim node.
When the LPTIM is clocked by the LSE with a prescaler
of 16 (lptim freq at 2048Hz) expecting 2048 for the TICKS_PER_SEC.
When the LPTIM is clocked by the LSE with a prescaler
of 32 (lptim freq at 1024Hz) expecting 1024 for the TICKS_PER_SEC.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-12-12 09:52:30 +00:00
Francois Ramu
302aae2749 doc: releases: add the reference to stm32_lp_tick_source
Update migration guide to introduce the stm32_lp_tick_source
for stm32 device when choosing the LPTIM fo lowPower modes.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-12-12 09:52:30 +00:00
Francois Ramu
759c9b42e3 boards: arm: stm32 boards with lptimer set node stm32_lp_tick_source
Change the name of the node for the lptim used as lowpower
tick source to stm32_lp_tick_source.
Once enabled, this node is known as stm32_lp_tick_source
That will avoid naming the node lptim1 or lptim2 or lptim, etc.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-12-12 09:52:30 +00:00
Francois Ramu
5bacc2eaac soc: arm: stm32 SYS_CLOCK_TICKS_PER_SEC config with STM32_LPTIM_TIMER
Configure the SYS_CLOCK_TICKS_PER_SEC directly from the
DTS st-prescaler property of the lptim node
aka stm32_lp_tick_source

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-12-12 09:52:30 +00:00
Francois Ramu
eeb7a88ff0 drivers: timer: stm32 lptimer adjust the TICKS_PER_SEC to LPTIM clock
With low LPTIM freq when prescaler is set to 16 or 32,
the CONFIG_SYS_CLOCK_TICKS_PER_SEC must be reduced to
LPTIM CLOCK_/prescaler to avoid spurious timer wakeup activity.
Assert error if the CONFIG_SYS_CLOCK_TICKS_PER_SEC
is not compatible with the lptim clock freq.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-12-12 09:52:30 +00:00
Francois Ramu
a19eb7cf88 drivers: timer: stm32 lptimer clock prescaler property
Rename to LPTIM_PRESCALER, the <st,property> prescaler of
the stm32 LPTimer. This commit gives better readability than
LPTIM_CLOCK_RATIO.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-12-12 09:52:30 +00:00
Jun Lin
fde31c03c5 driver: crypto: SHA: npcx: fix SHA driver for npcx4 QS chip
The commit fixes the SHA driver because the ROM API has the following
changes from ES to QS chip:
1. base addres: from 0x13c -> 0x148
2. required SHA context buffer size : from 228 -> 240 bytes

This change also adds a check for the pre-allocated buffer size of the
SHA context when the driver initiliazes.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2023-12-12 09:52:04 +00:00
Luca Burelli
11d4f8e5e5 soc: stm32: unify cache conditionals for F7 and H7 targets
The instruction cache in the STM32F7 and H7 was enabled regardless
of the value assigned via Kconfig to the CONFIG_ICACHE parameter.
This commit adds the missing conditional checks; note that this does
not affect the compiled behavior unless CONFIG_ICACHE is explicitly
disabled by the user.

Remove a redundant low-level check on DCache being already enabled,
since it is also performed inside the SCB_EnableDCache function.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
2023-12-12 09:51:11 +00:00
Anas Nashif
bd227e19cf twister: ignore testplan filters for integration mode
Testplan filters should be ignored when evaluating correctness of
integration configuration.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 22:10:56 -05:00
Ali Hozhabri
e3ec41e15c drivers: bluetooth: hci: Remove config BT_SPI_BLUENRG
Remove BT_SPI_BLUENRG Kconfig parameter as it is redundant according to
the new changes introduced by ST SPI protocol V1 and V2.

Remove "config BT_SPI_BLUENRG" from the boards that were using it.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2023-12-11 23:57:49 +00:00
Ali Hozhabri
8a32a70689 boards: arm: sensortile_box: Add BLE support for SensorTile.box board
Add BLE support for SensorTile.box board.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2023-12-11 23:57:49 +00:00
Ali Hozhabri
a67bc25b5f drivers: bluetooth: hci: Introduce ST SPI protocol V2
Introduce STMicroelectronics SPI protocol V2 which is used in BlueNRG-1
and successor devices.

Change the size of the variable "size" to 16 bits as it is necessary for ST
BlueNRG-1 and successor devices.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2023-12-11 23:57:49 +00:00
Ali Hozhabri
810df7cef9 drivers: bluetooth: hci: Remove header acquisition from bt_spi_send
Replace the header acquisition scope in bt_spi_send with bt_spi_get_header.

Add WRITE_DATA_CONDITION in order not to retransmit data without reading
the header as it is meaningless for ST BlueNRG devices.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2023-12-11 23:57:49 +00:00
Ali Hozhabri
36b0e26e64 drivers: bluetooth: hci: Restructure spi.c to handle different protocols
Update structure of spi.c to have a better and cleaner separation
between STMicroelectronics and Zephyr SPI protocol.

Introduce bt_spi_get_header to separate algorithms well for
header acquisition in different protocols.

Remove header acquisition from bt_spi_rx_thread to make it simpler.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2023-12-11 23:57:49 +00:00
Ali Hozhabri
d9c4ce7255 boards: arm: DTS update for ST boards that include BlueNRG-MS
Update DTS files of the STMicroelectronics boards which have BlueNRG-MS
as a BLE module.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2023-12-11 23:57:49 +00:00
Ali Hozhabri
a9f95f18aa dts: bindings: bluetooth: Add new yaml files for ST SPI protocol V1 and V2
Add "st,hci-spi-v1.yaml" to represent STMicroelectronics SPI protocol V1
which is used by BlueNRG-MS devices.

Add "st,hci-spi-v2.yaml" to show STMicroelectronics SPI protocol V2
utilized by BlueNRG-1 and successor devices.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2023-12-11 23:57:49 +00:00
Anas Nashif
ae39c3f7d7 arch: arm: z_arm_prep_c -> z_prep_c
Rename to use common naming for z_prep_c applied to all architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:23:52 -05:00
Anas Nashif
fb19d532ed arch: x86: z_x86_prep_c -> z_prep_c
Rename to use common naming for z_prep_c applied to all architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:23:52 -05:00
Anas Nashif
4a73fb1b92 x86: add CODE_UNREACHABLE after z_cstart
Add CODE_UNREACHABLE to be consistent with all other architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:23:52 -05:00
Anas Nashif
5a77fc239f arch: arm: z_arm64_prep_c -> z_prep_c
Rename to use common naming for z_prep_c applied to all architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:23:52 -05:00
Anas Nashif
9f3ed1b2b3 arch: _PrepC -> z_prep_c
Rename to use common naming for z_prep_c applied to all architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:23:52 -05:00
Anas Nashif
01264d23db drivers: intc: manage multi-level interrupt configs
Multilevel interrupt configs are leaking into every single build without
this option being enabled, so guard the Kconfig and include files to
avoid this.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:23:23 -05:00
Anas Nashif
552f7194e3 arch: exception: rename header guard
Match guard with header file name.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
ca3839ca38 arch: arm64: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
699880a430 arch: arm: cortex_m: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
4d5fd2edf2 arch: arm: cortex_a_r: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
1813a33108 arch: arm: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
87eb1d842f arch: arc: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
864731acdf arch: arm64: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
9d1a6b6db5 arch: xtensa: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
8447700013 arch: riscv: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Anas Nashif
4a020ecc02 arch: mips: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Dat Nguyen Duy
03b702690a include: arm: mpu: add missing RAM NOCACHE region define for armv8-r
Add missing define for a non-cacheable RAM region for MPU
on armv8-r aarch32

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2023-12-11 19:26:47 +01:00
Mariusz Skamra
af9f526ccd Bluetooth: has: Check writable preset support on preset registration
This fixes issue where API use is able to register writable preset even
if the CONFIG_BT_HAS_PRESET_NAME_DYNAMIC Kconfig option was disabled.

Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
2023-12-11 19:26:36 +01:00
Jukka Rissanen
0880dbee92 net: if: Tweak the documentation of multicast monitor API
As the API supports both IPv4 and IPv6, mention it clearly in
the header documentation.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2023-12-11 18:33:38 +01:00
Pieter De Gendt
157b22e5ec doc: connectivity: networking: api: Add doxygengroup for coap_mgmt
Make sure the CoAP event doxygen is added to the documentation.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-12-11 18:33:31 +01:00
Burt Silverman
a1358aaedf sys: Modify ATOMIC_BITMAP_SIZE macro: num_bits = 0
The macro returned the wrong value for any case in which
    num_bits<=0, due to a signed/unsigned division. The num_bits=0 case was
    hit using static analysis in a Nordic Semiconductor SDK case.

Signed-off-by: Burt Silverman <burtms@gmail.com>
2023-12-11 18:32:05 +01:00
Joakim Andersson
3b0b33b726 tfm: Add profile choice selection for Medium without ARoT enabled
Add profile choice selection for Medium without ARoT enabled.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2023-12-11 18:31:47 +01:00
Joakim Andersson
44106dac56 tfm: Update prompt for profile not set
Update prompt for profile type not set, make it appear in a similar
way as the rest of the options in the choice.

Add in parethesis "base", which is how this referred to in the upstream
TF-M documentation.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2023-12-11 18:31:47 +01:00
Joakim Andersson
02c5cd28db tfm: Fix indentation of help text for BUILD_WITH_TFM
Fix indentation of help text for BUILD_WITH_TFM.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2023-12-11 18:31:47 +01:00
Marcio Ribeiro
7543386f83 samples: input: espressif boards added to input_dump
Added some board overlay files to permit input touch sensor testing:
- esp32_devkitc_wroom
- esp32_devkitc_wrover
- esp32s2_saola
- esp32s3_devkitm

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2023-12-11 18:31:38 +01:00
Marcio Ribeiro
a9eb01ea4f boards: xtensa: esp32 board files update
touch_sensors default parameter added to .dts files and
input driver added to .yaml supported features array of:
- esp32_devkitc_wroom
- esp32_devkitc_wrover
- esp32s2_saola
- esp32s3_devkitm


Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2023-12-11 18:31:38 +01:00
Marcio Ribeiro
8cb870f7de driver: input: espressif touch_sensor
Espressif touch sensor driver implemented.

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2023-12-11 18:31:38 +01:00
Kuno Heltborg
220a57b0b1 mgmt: mcumgr: improve custom payload types
Use a flag in `c:struct:mgmt_handler` to skip the cbor start and end byte,
and instead use pure custom user defined payload.

Signed-off-by: Kuno Heltborg <kunoh@live.dk>
2023-12-11 18:31:23 +01:00
Emil Gydesen
cdd4bc6a48 Bluetooth: GMAP: Add GMAP BSIM test
Add BSIM testing of GMAP, with all spec-specified audio
configuration combinations added and tested.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2023-12-11 18:30:57 +01:00
Emil Gydesen
9c8ec58beb Bluetooth: GMAP: Add GMAP shell
Add the GMAP shell module with support for running the
various audio configurations in an easy way.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2023-12-11 18:30:57 +01:00
Emil Gydesen
7913ebfba3 Bluetooth: GMAP: Add initial implementation of GMAP
Add initial implementation of Gaming Audio Profile (GMAP).

This is a top layer profile in the LE Audio stack,
designed for low latency audio ideal for gaming.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2023-12-11 18:30:57 +01:00
Xiao Qin
7c46b0b898 drivers: display: uc81xx: add support for uc8175
Add support for uc8175 display driver. uc8175 has a slightly
different command/data length requirements for certain registers,
namely TRES and PTL, compared to uc8176/uc8179

This commit refactors the driver code and such that setting TRES and PTL
registers are now done by function pointers provided by config->quirks,
by the same token as how it is done for setting CDI register

Signed-off-by: Xiao Qin <xiaoq@google.com>
2023-12-11 15:57:21 +01:00
Benjamin Perseghetti
2b20c0e3e6 manifest: update hal_nxp for s32k3 lpspi.
Update hal_nxp to remove S32K3X4-0P55A-1P55A-ERRATA
by disabling FSL_FEATURE_LPSPI_HAS_ERRATA_050456.
This allows for lpspi to work correctly on mr_canhubk3.

Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
2023-12-11 08:39:24 -06:00