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arch: _PrepC -> z_prep_c

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Rename to use common naming for z_prep_c applied to all architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2023-12-08 07:55:21 -05:00
commit 9f3ed1b2b3
12 changed files with 18 additions and 18 deletions
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2
arch/arc/core/prep_c.c
View file

@ -88,7 +88,7 @@ extern FUNC_NORETURN void z_cstart(void);
* This routine prepares for the execution of and runs C code.
*/
void _PrepC(void)
void z_prep_c(void)
{
z_bss_zero();
#ifdef __CCAC__

4
arch/arc/core/reset.S
View file

@ -40,7 +40,7 @@ GTEXT(__start)
*
* Locking interrupts prevents anything from interrupting the CPU.
*
* When these steps are completed, jump to _PrepC(), which will finish setting
* When these steps are completed, jump to z_prep_c(), which will finish setting
* up the system for running C code.
*/
@ -202,4 +202,4 @@ _master_core_startup:
jl z_arc_firq_stack_set
#endif
j _PrepC
j z_prep_c

2
arch/arc/include/vector_table.h
View file

@ -46,7 +46,7 @@ GTEXT(__ev_div_zero)
GTEXT(__ev_dc_error)
GTEXT(__ev_maligned)
GTEXT(_PrepC)
GTEXT(z_prep_c)
GTEXT(_isr_wrapper)
#else

2
arch/mips/core/prep_c.c
View file

@ -42,7 +42,7 @@ static void interrupt_init(void)
* @return N/A
*/
void _PrepC(void)
void z_prep_c(void)
{
z_bss_zero();

4
arch/mips/core/reset.S
View file

@ -11,7 +11,7 @@
GTEXT(__initialize)
GTEXT(__stack)
GTEXT(_PrepC)
GTEXT(z_prep_c)
/*
* Remainder of asm-land initialization code before we can jump into
@ -52,6 +52,6 @@ aa_loop:
/*
* Jump into C domain.
*/
la v0, _PrepC
la v0, z_prep_c
jal v0
nop /* delay slot */

6
arch/nios2/core/crt0.S
View file

@ -12,7 +12,7 @@ GTEXT(__start)
GTEXT(__reset)
/* imports */
GTEXT(_PrepC)
GTEXT(z_prep_c)
GTEXT(z_interrupt_stacks)
/* Allow use of r1/at (the assembler temporary register) in this
@ -140,7 +140,7 @@ SECTION_FUNC(TEXT, __start)
* GH-1821
*/
/* Jump into C domain. _PrepC zeroes BSS, copies rw data into RAM,
/* Jump into C domain. z_prep_c zeroes BSS, copies rw data into RAM,
* and then enters z_cstart */
call _PrepC
call z_prep_c

2
arch/nios2/core/prep_c.c
View file

@ -28,7 +28,7 @@
* This routine prepares for the execution of and runs C code.
*/
void _PrepC(void)
void z_prep_c(void)
{
z_bss_zero();
z_data_copy();

2
arch/riscv/core/prep_c.c
View file

@ -27,7 +27,7 @@
* This routine prepares for the execution of and runs C code.
*/
void _PrepC(void)
void z_prep_c(void)
{
z_bss_zero();
z_data_copy();

6
arch/riscv/core/reset.S
View file

@ -16,7 +16,7 @@ GTEXT(__initialize)
GTEXT(__reset)
/* imports */
GTEXT(_PrepC)
GTEXT(z_prep_c)
GTEXT(riscv_cpu_wake_flag)
GTEXT(riscv_cpu_sp)
GTEXT(z_riscv_secondary_cpu_init)
@ -86,10 +86,10 @@ aa_loop:
#endif
/*
* Jump into C domain. _PrepC zeroes BSS, copies rw data into RAM,
* Jump into C domain. z_prep_c zeroes BSS, copies rw data into RAM,
* and then enters kernel z_cstart
*/
call _PrepC
call z_prep_c
boot_secondary_core:
#if CONFIG_MP_MAX_NUM_CPUS > 1

2
arch/sparc/core/prep_c.c
View file

@ -17,7 +17,7 @@
* This routine prepares for the execution of and runs C code.
*/
void _PrepC(void)
void z_prep_c(void)
{
z_data_copy();
z_cstart();

2
arch/sparc/core/reset_trap.S
View file

@ -48,7 +48,7 @@ SECTION_FUNC(TEXT, __sparc_trap_reset)
call z_bss_zero
nop
call _PrepC
call z_prep_c
nop
/* We halt the system by generating a "trap in trap" condition. */

2
boards/nios2/altera_max10/doc/index.rst
View file

@ -233,7 +233,7 @@ You will see output similar to the following:
Listening on port 3335 for connection from GDB: accepted
isr_tables_syms () at /projects/zephyr/arch/common/isr_tables.c:63
63 GEN_ABSOLUTE_SYM(__ISR_LIST_SIZEOF, sizeof(struct _isr_list));
(gdb) b _PrepC
(gdb) b z_prep_c
Breakpoint 1 at 0xdf0: file /projects/zephyr/arch/nios2/core/prep_c.c, line 36.
(gdb) b z_cstart
Breakpoint 2 at 0x1254: file /projects/zephyr/kernel/init.c, line 348.