This adds the configuration and set the DTS to pass
the dma/loop_transfer and the dma/chan_blen_transfer
on the nucleo_f429zi board.
The DMA2 instance supports mem2mem transfers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds the configuration to pass testcases
dma/loop_transfer and the dma/chan_blen_transfer
on the nucleo_l152re board.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds the configuration to pass testscases
dma/loop_transfer and the dma/chan_blen_transfer
on the nucleo_f091rc board.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Create a shared macro to access the pinctrl_0 property. The pinctrl_0
property includes pinmux phandle, pin and alternate function.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Increase LOG_PROCESS_THREAD_STACK_SIZE for ARCv3 64 bit to
fix failing test
tests/subsys/logging/log_core_additional/logging.add.async
due to stack overflow.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
This commit sets the below configuration when
tests/drivers/dma/chan_blen_transfer is executed on stm32f3_disco
platform.
CONFIG_DMA_TRANSFER_DRV_NAME="DMA_1"
CONFIG_DMA_TRANSFER_CHANNEL_NR_0=4
CONFIG_DMA_TRANSFER_CHANNEL_NR_1=2
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
This commit sets the below configuration when
tests/drivers/dma/loop_transfer is executed on stm32f3_disco
platform.
CONFIG_DMA_LOOP_TRANSFER_DRV_NAME="DMA_1"
CONFIG_DMA_LOOP_TRANSFER_CHANNEL_NR=4
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Driver does not correctly take ic out from sleep mode on init.
Added logic to update mode register on init to take the leddriver
out from sleep mode.
See datasheet for register details.
Fixes#37180
Signed-off-by: Daniel N. Hansten <dnh2000@gmail.com>
Busy simulator is using counter device and entropy device to
generate random cpu load. Counter device cofiguration can be
used to set cpu load interrupt priority and optional pin that
can be set during the load.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
On R-Car the Cortex R7 is usually not the boot processor.
This configuration file make use of the Cortex A57 processor,
to initialize the Cortex R7.
It boils down to few steps:
- Apply power to the Cortex R7
- Set the boot address for the Cortex R7
- loading a firmware
- releasing the Cortex R7 reset
This configuration file also rely on A57 bootloaders,
to initialize device, memory, and security groups.
This file has been tested on openocd 0.10.0+dev-01508-gf79c90268-dirty,
shipped with zephyr sdk 0.12.4, and on openocd master
65c9653cc768f77a5e8cf2af73e0f40d614bdec2.
Thread awareness is possible thanks to this patch:
http://openocd.zylin.com/#/c/6369/
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
When in le_ecred_reconf_req multiple CIDs are received host should
return 0x0002 error (Reconfiguration failed - reduction in size of
MPS not allowed for more than one channel at a time).
This affects test L2CAP/ECFC/BI-04-C
Signed-off-by: Krzysztof Kopyściński <krzysztof.kopyscinski@codecoup.pl>
In limited advertising advertising should end after certain timeout.
Previously, limited advertising was just general advertising with
BT_LE_AD_LIMITED flag set. Now, if this flag is set the work is
scheduled, that will disable advertising after timeout.
This affects tests GAP/DISC/LIMM/BV-03-C and GAP/DISC/LIMM/BV-04-C
Signed-off-by: Krzysztof Kopyściński <krzysztof.kopyscinski@codecoup.pl>
Add clock_control driver to stm32u5 support.
For this series, now deprecated STM32 clock Kconfig symbols
are not added.
Due to a divergence in MSI clock definition, PLL1 use
instead of PLL and lack of sufficient abstraction abstraction
for these a dedicated file has been added.
This should be reshuffled:
- once a better abstraction is provided by LL API for these
- when some stm32 clock control driver rework will be done
after complete removal of Kconfig STM32 clock symbols.
Tested in MSI, HSI, PLL based HSI and PLL based MSI.
Not tested on HSE due to lack of compatible hardware.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add initial basic description for Cortex-M33 based
stm32u5 soc series.
This encompass description for base nodes, such as:
- cpu
- flash
- clocks
- sram
Additionally, provide description for variant stm32u575Xi.
Related to clocks nodes, added bindings for stm32u5 specific
rcc node as well as msi and pll clocks.
Header file stm32_clock_control.h was also updated to support
these new bindings.
Note that for compatibility with existing definitions, clock
node describing main pll clock, known as "PLL1", was given two
labels: "pll" and "pll1".
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Adds support for testing of persistence storage
for mesh Babblesim tests. Adds a sample test
for testing provisioning data.
Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
The type of DMA for the stm32f0 devices was wrong
Its DMA is of type V2bis where the peripheral request is fixed.
The corresponding DMA cell has 2 elements.
The stm32f091 has two DMA instances.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixed the following assertion causing by high level functions
enable gpio interrupt at the same pin at least two times:
ASSERTION FAIL [!arch_irq_is_enabled(irq)]
@ ZEPHYR_BASE/arch/common/sw_isr_common.c:84 IRQ xxx is enabled
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Various non-secure variants of boards with SoCs that have Trusted
Firmware M support were recently renamed without any deprecations
added for the old names. This unnecessarily breaks the build for out
of tree users.
Fix that by adding the following deprecations (deprecated name ->
replacement name):
bl5340_dvk_cpuappns -> bl5340_dvk_cpuapp_ns
mps2_an521_nonsecure -> mps2_an521_ns
musca_b1_nonsecure -> musca_b1_ns
musca_s1_nonsecure -> musca_s1_ns
nrf5340dk_nrf5340_cpuappns -> nrf5340dk_nrf5340_cpuapp_ns
nrf9160dk_nrf9160ns -> nrf9160dk_nrf9160_ns
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This is more or less the flow of AT+CIPSEND:
RX TX
-- --
AT+CIPSEND=<...>
OK
>
<data to be sent>
SEND OK / SEND FAIL
'sem_response' semaphore is released by receiving 'OK'. Then after
receiving '>' (which releases 'sem_tx_ready' semaphore) actual data is
sent. Waiting for 'SEND OK' or 'SEND FAIL' is implemented by waiting on
'sem_response' (the same as for 'OK'), which mean that resetting this
semaphore just after sending all data is racy.
Fix that race condition by resetting 'sem_response' just after receiving
'OK', so that neither 'SEND OK' nor 'SEND FAIL' will appear yet (they
will not be sent as long as we won't send whole payload).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Sending AT+CIPSEND=<...> command results in following reply:
OK
>
modem_cmd_send_nolock() invocation was setting command handlers for '>',
but as 'OK' was received first, it was handled as a generic reply. After
receiving 'OK' this function was unsetting command handlers. Then
modem_cmd_handler_update_cmds() was called once again in order to
register '>' handler once again. There was a small period of time where
'>' was not being handled at all.
Fix that race condition by using just introduced modem_cmd_send_ext(),
which allows to leave commands handlers in place and get rid of race
condition where expected command could be missed.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There are currently modem_cmd_send() and modem_cmd_send_nolock()
functions, each with slightly different behavior regarding acquiring (or
not) sem_tx_lock. Introduce a generic function that will allow caller to
select behavior using flags.
While at it, add possibility to disable setting and unsetting command
handlers. This will be useful in situations when there are multiple
replies expected one after the other coming as a response to single
command. This is the case for example with ESP-AT driver, which expects
following data as response to AT+CIPSEND command:
OK
>
where 'OK' is handled by static CMD_RESP (so releasing response
semaphore right away), while '>' is handled by dynamic
CMD_HANDLER (which is releasing another semaphore). Keeping command
handlers in place allows to receive '>' without race condition because
of small period of time where command handlers are not set.
Convert modem_cmd_send_nolock() and modem_cmd_send() to static inline
functions, as they are just a specific invocation of
modem_cmd_send_ext() function.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Cleanup an #ifdef statement in swap_helper.S; use
ARMV6_M_ARMV8_M_BASELINE instead of listing all
Cortex-M baseline implementation variants. This
fixes an issue with Cortex-M23 whose Kconfig
define was not included in the original list.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Adding a new test-suite for HardFault validation,
for Cortex-M Mainline architecture.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When inside an escalated HardFault, we would like to get
more information about the reason for this escalation. We
first check if the reason for thise escalation is an SVC,
which occurs within a priority level that does not allow
it to trigger (e.g. fault or another SVC). If this is true
we set the error reason according to the provided argument.
Only when this is not a synchronous SVC that caused the HF,
do we check the other reasons for HF escalation (e.g. a BF
inside a previous BF).
We also add a case for a debug event, to complete going through
the available flags in HFSR.
Finally we ASSERT if we cannot find the reason for the escalation.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Move the assessment of a synchronous SVC error into a
separate function. This commit does not introduce any
behavioral changes.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Clean up a few more hard-coded constants
in swap_helper.S and replace them with
CMSIS-like defines in cpu.h. No behavioral
changes in this commit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When locking interrupt in a critical session, it is
safer to do MSR BASEPRI_MAX instead of BASEPRI. The
rationale is that when writing to BASEPRI_MAX, the
writing is conditional, and is only applied if the
change is to a higher priority level. This commit
replaces BASEPRI with BASEPRI_MAX in operations that
aim to lock some specific interrupts:
- irq_lock()
- masking out PendSV
So, for example, it is not possible to actually
unmask any interrupts by doing an irq_lock operation.
The commit does not introduce behavioral changes.
However, it makes irq_lock() more robust against
future changes to the IRQ locking mechanism.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Baseline Cortex-M requires VTOR to be aligned on 64-word
boundary. That is because bit-7 of VTOR is also RAZ/WI.
The commit updates the vector table section alignment for
Baseline Cortex-M to reflect the implementation constraint.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Move the implementation of z_platform_init from the NXP Hal
into the main Zephyr tree. This function is Zephyr-specific,
is part of the Zephyr module glue code, and does not need to
reside in the module repository. We also rename the function
to z_arm_platform_init. The commit does not introduce any
behavioral changes.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
