Commit graph

45351 commits

Author SHA1 Message Date
Daniel Leung
f8a909dad1 xtensa: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Note that this does not enable TLS for all Xtensa SoC.
This is because Xtensa SoCs are highly configurable
so that each SoC can be considered a whole architecture.
So TLS needs to be enabled on the SoC level, instead of
at the arch level.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
8a79ce1428 riscv: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
388725870f arm: cortex_m: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Note that since Cortex-M does not have the thread ID or
process ID register needed to store TLS pointer at runtime
for toolchain to access thread data, a global variable is
used instead.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
778c996831 arm: cortex_r: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
df77e2af8b arm64: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
4b38392ded x86: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
53ac1ee6fa x86_64: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
55c3fb3ff1 tests: add a simple test for thread local storage
This adds a simple test to make sure TLS works.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
02b20351cd kernel: add common bits to support TLS
This adds the common struct fields and functions to support
the implementation of thread local storage in individual
architecture. This uses the thread stack to store TLS data.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
3180fc0ecc linker: add linker sections for thread local storage
This adds the tdata and tbss sections required for thread local
storage. They are in ROM area as these sections are not to be
directly accessed, but copied to thread local storage area at
thread creation.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
97db4ac0ca libc: add hidden option CONFIG_NEED_LIBC_MEM_PARTITION
The z_libc_partition was only enabled when newlib is being used,
and/or stack canaries are needed. This adds a hidden option
where this partition can be enabled if needed, regardless of
whether newlib is used or stack canaries are needed.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
240beb42af kconfig: add configs for thread local storage
Add kconfigs to indicate whether an architecture has support
for thread local storage (TLS), and to enable TLS in kernel.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Andrew Boie
ad110d495e kernel: fatal: check if _current is NULL
Arches which have custom swap to main can have _current be
NULL very, very early in the boot process. Check this to
avoid an infinite loop of fatal errors.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-24 12:54:32 -04:00
Lingao Meng
27739fcc43 Bluetooth: Mesh: Add queue_size and recv_win to lpn_cb
Add Queue Size and Receive Window information to lpn
callback function to notify upper layer to determine
currently friend node information, which may be used
in future.

Add Callback structure to notification application which friendship
has been changed.

Add function `bt_mesh_friend_terminate` let's app layer determine
terminate friendship manually.

Signed-off-by: Lingao Meng <mengabc1086@gmail.com>
2020-10-24 10:57:45 +03:00
Andy Ross
60fb850713 scripts/west_commands: Don't demand non-empty output formats
It's not clear why this error is here.  The "formats" array seems to
be limited to "bin" and "hex" only, but every signing tool is going to
have its own idea of what format to emit and what ingredients need to
be used to do that.

In particular, rimage (used for the Intel Audio DSPs) doesn't use nor
generate zephyr.bin (it's very large), so it trips over this failure.

Just present the possibly-empty list of output formats to the Signer
object and let it make the decision about whether an empty formats
list is an error.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-23 22:22:52 -04:00
Andrew Boie
f5c3fc498b kernel: add arch_mem_unmap() interface
The core kernel does not use this yet, but it will be later used
as part of infrastructure for memory-mapping stacks, as detailed
in #28899.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-23 22:02:47 -04:00
Johan Hedberg
1c23a19c36 x86: pcie: Fix array index for bus_segs
This seems like a typo since all other places accessing bus_segs in
this context use i as the index.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-10-23 22:01:59 -04:00
Carlo Caione
47c592cd32 mmu: Fix mapping_pos calculation
In the MMU code mapping_pos is miscalculated when for example
SRAM_BASE_ADDRESS==0x40000000 and KERNEL_VM_SIZE==0xc0000000 getting a
mapping_pos of 0x0.

The problem is that we must cast the two values to uintptr_t before
casting the result to avoid the rollover to 0.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-10-23 16:24:04 -04:00
Andy Ross
e5f0571cbc soc/intel_adsp: Remove "firmware ready" message sending
This IPC protocol is designed to tell the host driver that the audio
firmware is ready.  It's not used within the Zephyr in-tree test code,
which does not run under the control of a host driver.  And SOF
already does this on its own, the Zephyr attempt to do it first (and
incorrectly) confuses the driver IPC.

Just remove it.  This is clearly application code, not platform code.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-23 12:53:53 -04:00
Nicolas Pitre
c227fe7b80 lib/os/heap: Correct aligned_alloc sizing for small heaps
The code that made aligned_alloc work with the 4-byte heap headers was
requesting a block of the correctly padded size, and correctly
aligning the output buffer within that memory, but it was using the
UNALIGNED chunk size for the buffer as the final size of the block
with splitting off the unused suffix.  So the final chunk in the
buffer was could be incorrectly returned to the heap and reused,
leading to overlap.

Compute the chunk size of the output buffer based on the
already-aligned output pointer instead.

Initial investigation and fix from Andy Ross <andrew.j.ross@intel.com>.
I reworked his fix, created a test case, and stolen his commit log.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2020-10-23 12:52:04 -04:00
Gerson Fernando Budke
9b43ac7c76 include: dt-bindings: Add macros entry point for DTS preprocessor
Introduce <dt-bindings/dt-util.h> file.  It wraps <sys/util_macro.h>
file exposing all macro base definitions to DTS preprocessor.  Once it
contains only prepocessor macros, it can be safely included in DTS,
similar way the <dts/arm/<manufacturer>/pinctrl_<manufacturer>_<soc>.h
files are included.

This provides necessary background to elaborate complex constructions
like variable length macros with zero or more elements.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-10-23 09:38:55 -05:00
Gerson Fernando Budke
6b05121e65 include: sys: util: Move macros from util to util_macro
The <sys/util.h>, in current form, can not be used with DTS as it
contains non-C pre-processor definitions which breake DTS interpreter.
This commit fixes the problem by moving most of preprocessor macros
from util.h to util_macro.h.  Since util_mcaro.h contains only
preprocessor macros, without include dependencies, it can be safely
included in DTS. It is similar way the
<dts/arm/<manufacturer>/pinctrl_<manufacturer>_<soc>.h files are
included.

This fix and align the extern "C" closing brack inside non assembly
block.

The issue was raised when try create a macro for pincrtl with a
variable length flag list.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-10-23 09:38:55 -05:00
Kumar Gala
dc0466f8a1 tests: drivers: build_all: Rework modem test to be more generic
Add support to build all current modem drivers (WNCM14A2A, GSM PPP, and
ublox-sara).  We need a unique config for ublox-sara to be built since
the networking params conflict with other modem drivers.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-23 08:53:38 -05:00
Kumar Gala
e5eeb9d2f8 dts: bindings: test: Update vnd,serial to not require interrupts
We aren't using vnd,serial for anything currently.  Remove requiring
interrurpts property as that requirement isn't needed.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-23 08:53:38 -05:00
Kumar Gala
9f97a1c8ab drivers: modem: wncm14a2a: fix build if CONFIG_MODEM_SIM_NUMBERS=n
If CONFIG_MODEM_SIM_NUMBERS is 'n' than the data_imei field of struct
modem_context doesn't exist, so add ifdef protection for that case.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-23 08:53:38 -05:00
Kumar Gala
033d82460a dts: bindings: Fix some YAML issues
Fix a few duplicated key issues in a small handful of binding files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-23 08:02:19 -05:00
Bent Ove Stinessen
72d5dee2e3 drivers: gpio_pca95xx: Add GPIO driver enable interrupt support
Allows the use of pin interrupt and callbacks for pca95xx family
GPIO expander chips with an interrupt line.

Enable config flag and define a gpio pin for the expander interrupt-
line (INT) in devicetree and the driver will accept pin interrupt
configurations for the expander gpio pins.

Level triggering is supported through emulation.
A worker is used to avoid waiting for I2C in ISR.

Example devicetree node:
	gpioext0: tca9539@77 {
		compatible = "nxp,pca95xx";
		label = "GPIO_EXT_0";
		reg = <0x77>;
		interrupt-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <16>;
	};

Fixes: #27561

Signed-off-by: Bent Ove Stinessen <bent@norbit.no>
2020-10-23 13:47:41 +02:00
Jakub Pegza
3292b50be9 modules: Add nrf 802.15.4 radio drv buffer config
Add configuration options for chaning number of buffers used by nRF
802.15.4 radio driver.

Signed-off-by: Jakub Pegza <Jakub.Pegza@nordicsemi.no>
2020-10-23 13:20:45 +02:00
Joakim Andersson
948615d247 Bluetooth: shell: Fix ifdef order in command inclusion
Fix ifdef in command inclusion, in practice this meant that
CONFIG_BT_LL_SW_SPLIT and CONFIG_BT_CTLR_ADV_EXT switched meaning.
Added blank lines so that the commands in shell/ll.c are more
easily visible as group.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-10-23 12:56:39 +02:00
Vinayak Kariappa Chettimada
28d6028127 Bluetooth: controller: Periodic Adv Sync on Coded PHY
Added implementation to be able to establish Periodic
Advertising Sync on Coded PHY.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2020-10-23 12:56:13 +02:00
Anas Nashif
3ac163eae6 boards: rename up_squared_adsp intel_adsp_cavs15
The Audio DSP is not specific to up_squared, so make it more generic.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-23 12:56:03 +02:00
Anas Nashif
388a465d9d soc: intel_adsp: remove stray soc directory
This is now covered by intel_adsp.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-23 12:56:03 +02:00
Dominik Ermel
1241e67790 fs: Move fs_file_system_t declaration out of fs.h
The struct fs_file_system_t is only useful when defining file system
drivers and is not required for typical application development,
that is why it has been moved to separate file fs_sys.h.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-10-23 12:55:41 +02:00
Clotilde Sattler
168f8bec6d nrfx_spi and nrfx_spim: Fix SPI assert and busy error
This removes a semaphore unlock in init_spi function
which causes risks of competitive access

Signed-off-by: Clotilde Sattler <clotilde.sattler@stimio.fr>
2020-10-23 12:53:19 +02:00
Crist Xu
237b34ef2d watchdog: Add watchdog driver
Add watchdog driver for the RT1050/60

Signed-off-by: Crist Xu <crist.xu@nxp.com>
2020-10-23 12:52:13 +02:00
Jukka Rissanen
899228bb7f net: icmpv6: Store ll addresses to pkt when sending error msg
When we are sending ICMPv6 error message, we need to store the
link local addresses of the received packet somewhere in order
to know where to send the new error message.
Easiest is to store the ll addresses is to the error message
itself, just before where the sent packet will start in memory.
We cannot use the original pkt to store the ll addresses
as that packet might get overwritten if we receive lot of packets.

Fixes #29398

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-10-23 09:29:27 +03:00
Andrew Boie
933b420235 kernel: add context pointer to thread->fn_abort
For compatibility layers like CMSIS where thread objects
are drawn from a pool, provide a context pointer to the
exited thread object so it may be freed.

This is somewhat obscure and has no supporting APIs or
overview documentation and should be considered a private
kernel feature. Applications should really be using
k_thread_join() instead.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-22 23:32:37 -04:00
Andrew Boie
afe42bd129 arch_interface: update arch_mem_domain_thread_add
Implementations may assume the target thread isn't already
a member of the memory domain.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-22 16:47:07 -07:00
Andrew Boie
ba7e89b1d6 tests: sys_mutex: don't add to default domain
This is unnecessary; static threads start in the default
memory domain.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-22 16:47:07 -07:00
Andrew Boie
fa6db61eb2 userspace: do nothing if added to same domain
If we call k_mem_domain_add_thread() to a memory domain
the thread already belongs to, do nothing.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-22 16:47:07 -07:00
Gerard Marull-Paretas
e807769dce drivers: display: ili9340: align register names
Align register names with the ones found in the datasheet. It is easier
to follow datasheet if names are the same.

Some other minor enhancements have also been introduced (comments, use
BIT for bit fields...).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-22 15:31:18 -05:00
Andrew Boie
941322c49e userspace: document multiple mem domain init calls
k_mem_domain objects should not be initialized multiple times,
there's no support for memory domain life-cycles or freeing
memory that an arch_mem_domain_init() may have allocated.
Clearly document this.

The init function has to assume the provided domain is un-
initialized memory so it's not possible to robustly check
for this; a note is left in the arch_ definition to add an
assertion if feasible.

It's really unsafe to call an init function on any kernel
object more than once, but in this particular case if the
memory domain initialization resulted in the creation of
page tables or linked data structures really bad things can
happen. Currently no arch implements arch_mem_domain_init()
yet, but this is changing soon for x86.

One test case currently does this, it will be fixed in
a forthcoming patch.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-22 15:35:25 -04:00
Erwan Gouriou
68e071ae81 boards: Move USB pin configuration to device tree for 2 STM32 boards
As a proof of concept, turn USB signals configuration to USB
for nucleo_wb5rg and disco_l475_iot1 boards.

This implicitly remove pull-up on _ID pin, which turn out to
have no side effect.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-22 10:34:14 -05:00
Erwan Gouriou
a1cb59398b drivers/usb: stm32: Add support for pinctrl configuration
Enable configuration of USB signals in stm32 driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-22 10:34:14 -05:00
Erwan Gouriou
5a9eff1e1a drivers/usb: stm32: Clean up related to DT api usage
Few adjustments made to make the code a bit more readable.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-22 10:34:14 -05:00
Erwan Gouriou
c586f84602 dts/bindings/usb: Add pinctrl-0 property to STM32 USB bindings
Add pinctrl-0 prop to enable support of USB pinctrl in STM32
USB driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-22 10:34:14 -05:00
Erwan Gouriou
b710baeb3f west.yaml: hal_stm32: Get USB signals
Point to hal_stm32 PR adding USB signals

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-22 10:34:14 -05:00
Joakim Andersson
6ae68c48f4 Bluetooth: UUID: Document endianness in UUID helper macros
Improve the documentation of the UUID header by adding documentation
for all helper macros.
Be explicit in which macros that expects host endianness, and which
ones that expects little endian format.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-10-22 18:00:45 +03:00
Maureen Helm
588890faf9 boards: soc: arm: Set zephyr,dtcm chosen node for i.mx rt boards
Sets the device tree chosen node for data tightly coupled memory (DTCM)
on i.mx rt boards that aren't already using DTCM as the chosen SRAM.
Leverages the common cortex-m linker section instead of the soc-specific
one.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-22 09:32:11 -05:00
Maureen Helm
07976026a2 boards: soc: arm: Set zephyr,sram chosen node for i.mx rt boards
Removes the DATA_LOCATION Kconfig symbol from the i.mx rt soc series and
refactors corresponding boards to use a device tree chosen node instead.
The external SDRAM is chosen on all boards that can support it;
otherwise the internal DTCM is chosen.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-22 09:32:11 -05:00