arm: cortex_m: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack area and sets up CPU registers during context switch. Note that since Cortex-M does not have the thread ID or process ID register needed to store TLS pointer at runtime for toolchain to access thread data, a global variable is used instead. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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8 changed files with 52 additions and 1 deletions
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@ -32,7 +32,7 @@ config ARM
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# FIXME: current state of the code for all ARM requires this, but
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# is really only necessary for Cortex-M with ARM MPU!
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select GEN_PRIV_STACKS
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select ARCH_HAS_THREAD_LOCAL_STORAGE if ARM64 || CPU_CORTEX_R
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select ARCH_HAS_THREAD_LOCAL_STORAGE if ARM64 || CPU_CORTEX_R || CPU_CORTEX_M
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help
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ARM architecture
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@ -14,6 +14,7 @@ zephyr_library_sources(
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)
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zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
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zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)
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if(CONFIG_CORTEX_M_DWT)
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if (CONFIG_TIMING_FUNCTIONS)
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19
arch/arm/core/aarch32/cortex_m/__aeabi_read_tp.S
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19
arch/arm/core/aarch32/cortex_m/__aeabi_read_tp.S
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@ -0,0 +1,19 @@
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/*
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* Copyright (c) 2020 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <toolchain.h>
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_ASM_FILE_PROLOGUE
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GTEXT(__aeabi_read_tp)
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GDATA(z_arm_tls_ptr)
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SECTION_FUNC(TEXT, __aeabi_read_tp)
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/* Grab the TLS pointer and store in R0 */
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ldr r0, =z_arm_tls_ptr
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ldr r0, [r0]
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bx lr
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@ -30,6 +30,10 @@ GDATA(_k_neg_eagain)
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GDATA(_kernel)
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#if defined(CONFIG_THREAD_LOCAL_STORAGE) && defined(CONFIG_CPU_CORTEX_M)
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GDATA(z_arm_tls_ptr)
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#endif
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/**
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*
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* @brief PendSV exception handler, handling context switches
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@ -180,6 +184,16 @@ out_fp_endif:
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*/
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mcr 15, 0, r0, cr13, cr0, 3
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#endif
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#if defined(CONFIG_CPU_CORTEX_M)
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/* For Cortex-M, store TLS pointer in a global variable,
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* as it lacks the process ID or thread ID register
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* to be used by toolchain to access thread data.
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*/
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ldr r4, =z_arm_tls_ptr
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str r0, [r4]
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#endif
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#endif
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/* Restore previous interrupt disable state (irq_lock key)
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@ -8,8 +8,19 @@
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#include <kernel_structs.h>
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#include <kernel_internal.h>
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#include <kernel_tls.h>
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#include <app_memory/app_memdomain.h>
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#include <sys/util.h>
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#ifdef CONFIG_CPU_CORTEX_M
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/*
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* Since Cortex-M does not have the thread ID or process ID
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* register needed to store TLS pointer at runtime for
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* toolchain to access thread data. Use a global variable
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* instead.
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*/
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K_APP_DMEM(z_libc_partition) uintptr_t z_arm_tls_ptr;
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#endif
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size_t arch_tls_stack_setup(struct k_thread *new_thread, char *stack_ptr)
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{
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/*
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@ -160,6 +160,7 @@ SECTIONS
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*(.text)
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*(".text.*")
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*(".TEXT.*")
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*(.gnu.linkonce.t.*)
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/*
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@ -200,6 +201,7 @@ SECTIONS
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_image_rodata_start = .;
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#include <linker/common-rom.ld>
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#include <linker/thread-local-storage.ld>
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SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
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{
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@ -71,6 +71,9 @@ extern struct k_mem_partition z_malloc_partition;
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defined(CONFIG_NEED_LIBC_MEM_PARTITION)
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/* Minimal libc has no globals. We do put the stack canary global in the
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* libc partition since it is not worth placing in a partition of its own.
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*
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* Some architectures require a global pointer for thread local storage,
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* which is placed inside the libc partition.
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*/
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#define Z_LIBC_PARTITION_EXISTS 1
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@ -856,6 +856,7 @@ config TICKLESS_KERNEL
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config THREAD_LOCAL_STORAGE
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bool "Thread Local Storage (TLS)"
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depends on ARCH_HAS_THREAD_LOCAL_STORAGE
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select NEED_LIBC_MEM_PARTITION if (CPU_CORTEX_M && USERSPACE)
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help
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This option enables thread local storage (TLS) support in kernel.
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