These macros (LPSRAM_MASK, SRAM_BANK_SIZE, HOST_PAGE_SIZE) never
change, and are always used in just one file.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The HP SRAM block address and size is specified in four different ways
(devicetree, "SRAM_*", "HP_SRAM_*" and "L2_SRAM_*" macros). Unify,
moving the C definition (which just fetches it from dts) to a single
header and out of the platform layer.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This was an abstraction layer without a purpose. All existing
platforms have the same (LXn core) layout. When we need to split this
out in the future, the right thing will be to use the values already
provided by the platform core-isa.h and not duplicate them anyway.
Think of this as a first step to an incoming rework of the Zephyr
Xtensa interrupt entry generation, which is long overdue.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This feature is in tree and used by the SOF app, but we don't have a
local test for it. Add one, including a case to track regressions in
a known failure mode (where the second CPU wouldn't get its IDC
interrupts set up correctly if spawned at runtime).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The generic bootloader code used a per-device "platform.h" file
imported from SOF. These turn out to have very little actual content.
Move them to the core directory in a single header for now, pending
some rework to place the settings in devicetree.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The linker script (and a little bit of SOF) still has support for an
older mechanism for bootstrapping secondary cores by copying code into
lp-sram from a "manifest" emitted by the linker. This actually never
worked in Zephyr, and we've implemented a different scheme that uses a
small runtime-copied trampoline instead.
Remove.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Each platform was defining its own shim.h header, with slightly
variant field definitions, for a register block that is almost
completely compatible between versions. This is made worse by the
fact that these represent an API imported fairly early from SOF, the
upstream version of which has since diverged.
Move the existing shim struct into a header ("cavs-shim.h") of its
own, remove a bunch of unused symbols, fill in definitions for some
registers that were left out, correct naming to match the hardware
docs in a few places, make sure all hardware dependencies are source
from devicetree only, and modify existing usage to use the new API
exclusively.
Interestingly this leaves the older shim.h header in place, as it
turns out to contain definitions for a bunch of things that were never
part of the shim register block. Those will be unified in separate
patches.
Finally: note that the existing IPM_CAVS_IDC driver (soon to be
removed from all the intel_adsp soc's) is still using the old API, so
redeclare the minimal subset that it needs for the benefit of the
platforms in transition.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Reorganize the initialization code to cleanly separate the platforms
and clarify which code is common. The #if'ery was sort of a mess.
This is in preparation for an incoming patch that unifies the shim
register definitions across platform variants.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This is dead code. It's based on the cAVS "IPC" mechanism to allow
communication to and from the host CPU. But there is no test rig in
the Zephyr tree for the protocol defined. And in fact the only
Zephyr-based user of the IPC mechanism (Sound Open Firmware) has its
own IPC driver and speaks its own protocol with the host kernel. That
driver needs to migrate into Zephyr soon and this legacy bit is just
confusing.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Misc cleanup, no non-trivial logic changes.
Swap in new ("rsr <reg>, REGISTER_NAME") syntax for Xtensa SR's in
place of inconsistent usage of the older one ("rsr.REGISTER_NAME
<reg>").
Remove the legacy handling of !KERNEL_COHERENCE cases for allocating
the cpu start record. That has long been a requirement of
multiprocessor code on this platform.
Remove the synchronous testing of the "alive" flag in
arch_start_cpu(). Nothign about that API is intended to be
synchronous, and in fact the Zephyr SMP layer is already doing the
same trick.
Remove some vestigial dead code at the end of z_mp_entry(). It was
apparently intended to handle the case where a CPU function returned,
but that's not legal anyway. And it was only enabled in the case
where there was only one CPU anyway, which was an impossible situation
(you can't evercall arch_start_cpu() successfully on a system with
only one core, for obvious reasons -- the only core is already
running!). Replace with an assertion.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The cAVS bootloader code (for... somewhat silly reasons) doesn't build
via the same paths as regular Zephyr object files, so it wasn't
getting the _ASMLANGUAGE define. That meant that Zephyr headers
defining BIT() were using syntax incompatible with some assemblers
(specifically the Cadence xcc assembly; current gas versions were
fine).
Not 100% sure this is the best spot to put this, but the root fix is
to get the bootloader building into the same link as the rest of
Zephyr anyway.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Recent work to this platform added a new, cleaner low level API to the
interrupt controller. Replace the hand-cooked register access with
that. This is still not as good as having proper multicore support in
the intc_cavs driver, but it's at least better.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
In case the payload and header size exceeded the network MTU size,
`websocket_send_msg()` would only send a part of the payload,
effectively leading to erronous results if called again to send the
rest. Fix the issue, by calling `sendmsg()` in a loop internally in case
it did not manage to send the entire websocket message in a single call.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Fix the dummy ISO Broadcast PDU for correct LLID when
testing with burst number, immediate repetition count and
pre-transmission offset.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix missing link buffer allocation for ISO Broadcaster role.
Without this allocation, create BIG will fail.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
- Rename time start/stop variables
- Use uint8_t vs. int as loop index variable type
- Flag unused variables
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stats are an optional feature, moving it into a separate source file
improves code readability.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace PM_STATE_LEN with PM_STATE_COUNT, so that number of states is
automatically computed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Device data is cleared on deinitialization. This operation removes
some important information. Let's restore the defaults each time
the device is initialized.
Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
fix uart_sam0_irq_update to only clear the RXS bit by writing only the
RXS bitflag to the INTFLAG register. Performing an |= opperation
with the bitflag for RXS incorrectly clears all pending interrupts set
since writing 1 to a INTFLAG clears that bit field. This causes a race
condition on when TXC will be cleared before all bytes have finished
being clocked out on tx and TXC being set 1 again. If tx finishes first,
any driver using uart_irq_tx_complete will deadlock the system.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
sam0 does not currently have a uart_irq_tx_complete method for interrupt
driven mode.
This is especially important since the sam0 platform has seperate
interrupt signals for TX data register empty and TX complete therefore
the TX register being empty does not nessisarily mean the data has been
shifted out.
Drivers should check uart_irq_tx_complete if it needs to guarantee
that the data has been fully transmitted in a hardware agnostic way.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
Since 581c20e242 ("drivers: uart: Cleanup not supported API handling")
uart_fifo_read() returns -ve on errors. Correct the check on its return
value to work with this new API.
CID: 240662
Fixes: #39840
Signed-off-by: Siddharth Chandrasekaran <sidcha.dev@gmail.com>
Following the change in remap information encoding/decoding in
stm32 pinmux driver, use new -pinctrl.dtsi which use the matching
remap information encoding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Aim of this change is to remove the need for the pinmux driver
on stm32f1 series to access the base address of the pinmux owner
device.
This is achieved by a modification in the device tree pin definition.
Instead of providing a generic information on type of the remap
(such as NO_REMAP, PARTIAL_REMAP, FULL_REMAP), the remap field
encodes all the information required to perform the remap register
configuration:
-Address of the targeted remap register in AFIO peripheral
-Position of the remap configuration in the remap register
-Mask used for the remap configuration encoding
-Value of the expected remap configuration.
All the possible remap configurations are encoded and predefined
in a new stm32f1-afio.h dt-bindings include.
To match this new configuration, all stm32f1 -pinctrl.dtsi should
be regenerated to use these new remap definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Review pinmux macro definition to a more portable format,
in preparation for new remap information encoding on stm32f1 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Failed to flash blinky example to stock nucleo_wl55jc due to default
application entering low power mode using WFI. To connect to a sleeping
stm32wl55 a system reset is required.
Signed-off-by: Jelle De Vleeschouwer <jelledevleeschouwer@gmail.com>
`net_eth_vlan_enable()` allowed to use illegal vlan tag values, fix this
by disallowing any tag value higher or equal to 0xfff (which is a limit
for the tag and a reserved value).
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
A lock was added to manage situation where the API poll_out and irq API
are used in same time.
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
This action replaces current buildkite workflow and uses github actions
to build and run tests in the zephyr tree using twister. The main
differences to current builtkite workflow:
- the action handles all 3 events: pull requests, push and schedule
- the action determines size of matrix (number of build hosts) based on
the change with a minimum of 1 builder. If more tests are built/run
due to changes to boards or tests/samples, the matrix size is
increased. This will avoid timeouts when running over capacity due to
board/test changes.
- We use ccache and store cache files on amazon S3 for more flexibility
- Results are collected per build host and merged in the final step and
failures are posted into github action check runs.
- It runs on more powerful instances that can handle more load.
Currently we have 10 build hosts per run (that can increase depending
on number of tests run) and can deliver results within 1 hour.
- the action can deal with non code changes and will not allocate more
than required to deal with changes to documentation and other files
that do not require running twister
The goal long-term is better integrate this workflow with other actions
and not run unncessarily if other workflows have failed, for example, if
commit message is bogus, we should stop at that check, to avoid wasting
resources given that the commit message will have to be fixed anyways
which would later trigger another run on the same code.
Currently there is 1 open issue with this action related to a github
workflow bug where the final results are not posted to the same workflow
and might appear under other workflows. Github is working on this bug.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Do not load empty files through the ELF parser and raise exception when
magic number of ELF is not matched.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Adds an API to query and visit supported devices. Follows the example
set by the required devices API.
Implements #37793.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add supported device information to the device `handles` array. This
enables API's to iterate over supported devices for power management
purposes.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
