drivers: cavs_timer: Use the new interrupt controller API

Recent work to this platform added a new, cleaner low level API to the
interrupt controller.  Replace the hand-cooked register access with
that.  This is still not as good as having proper multicore support in
the intc_cavs driver, but it's at least better.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

drivers/timer/cavs_timer.c

@@ -7,6 +7,7 @@
 #include <drivers/timer/system_timer.h>
 #include <sys_clock.h>
 #include <spinlock.h>
+#include <cavs-idc.h>
 
 /**
  * @file
@@ -195,9 +196,6 @@ void smp_timer_init(void)
 	 * FIXME: Done in this way because we don't have an API
 	 * to enable interrupts per CPU.
 	 */
-	sys_set_bit(DT_REG_ADDR(DT_NODELABEL(cavs0))
-			+ CAVS_ICTL_INT_CPU_OFFSET(arch_curr_cpu()->id)
-			+ 0x04,
-		    22 + TIMER);
+	CAVS_INTCTRL[arch_curr_cpu()->id].l2.clear = CAVS_L2_DWCT0;
 	irq_enable(TIMER_IRQ);
 }