The document is now structured into the three different APIs. In
addition to that, a section for relevant Kconfig options is added.
Signed-off-by: Martin Jäger <martin@libre.solar>
- Introduce Doxygen groups for the different APIs (polling, interrupt-
driven, asynchronous).
- Hide internal driver API as it confuses the average user.
- Move Async API to the bottom so that the file is ordered from generic
to more specific/sophisticated functions.
No code was changed.
Signed-off-by: Martin Jäger <martin@libre.solar>
`bt_gatt_cancel` takes a `bt_gatt_.._params` pointer. The `params`
pointer is mistakenly passed on to `bt_att_req_cancel`, which expects a
`bt_att_req`.
This change makes bt_gatt_cancel locate the `req` and pass that to
`bt_att_req_cancel`.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Co-authored-by: Emil Gydesen <Thalley@users.noreply.github.com>
In include/sys/device_mmio.h, replacing <toolchain/common.h>
fixes the following warning:
$ west build -b qemu_x86 tests/arch/x86/static_idt/
In file included from zephyr/include/toolchain.h:50,
from zephyr/include/linker/section_tags.h:12,
from zephyr/include/linker/sections.h:132,
from zephyr/include/sys/device_mmio.h:19,
from zephyr/include/drivers/interrupt_controller/loapic.h:14,
from zephyr/include/drivers/interrupt_controller/sysapic.h:10,
from zephyr/include/arch/x86/arch.h:231,
from zephyr/include/arch/cpu.h:15,
from zephyr/tests/arch/x86/static_idt/src/test_stubs.S:17:
zephyr/include/toolchain/gcc.h:61: error: BUILD_ASSERT redefined [-Werror]
61 | #define BUILD_ASSERT(EXPR, MSG...) _Static_assert(EXPR, "" MSG)
|
In file included from zephyr/include/sys/device_mmio.h:18,
from zephyr/include/drivers/interrupt_controller/loapic.h:14,
from zephyr/include/drivers/interrupt_controller/sysapic.h:10,
from zephyr/include/arch/x86/arch.h:231,
from zephyr/include/arch/cpu.h:15,
from zephyr/tests/arch/x86/static_idt/src/test_stubs.S:17:
zephyr/include/toolchain/common.h:165: note: this is the location of the
previous definition
165 | #define BUILD_ASSERT(EXPR, MSG...) \
<toolchain.h> provides a compiler-specific BUILD_ASSERT.
<toolchain/common.h> provides a generic, fallback BUILD_ASSERT and
should probably never be included directly.
Thanks to Gerard Marull-Paretas for recommending this fix.
Related to commit af20208cd9 ("devices: mark device MMIO declarations
to boot/pinned sections") that added #include <linker/sections.h>
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Fixes: #41435
Remove build host specific escaping of start symbol command argument.
The start symbol for armlink is: Image$$device$$Base
and were escaped as: Image\\$$\\$$device\\$$\\$$Base
However, the $ must only be escaped in Linux and MacOS, not on windows
hosts.
Instead of escaping the start symbol in the CMake code then it is better
to use the VERBATIM flag on `add_custom_command()` which ensures correct
escaping for the build host.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #41435
The use of %<symbol>% works well in Linux and MacOS but when passed
to the linker script generator in Windows the %<symbol>% is processed
by the windows shell causing the value to disappear and thus an empty
value inside the generated ld linker script or scatter file.
This is fixed by using the @ character instead of the % character.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
HSE clock frequency value depends on target.
It can't be defaulted.
Remove this property to ensure it is set properly for each target.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To ease maintenance, add a common section.
It appears that using DTC_OVERLAY_FILE in the common section
preserves the required overlay order.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on default board configuration,
add a specific test for this config.
Additionally rename existing pll_msi_80 to pll_msis_160.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on existing board clock configuration,
use a clear_clocks.overlay file to first reset the clock
configuration to the default .dtsi state, then apply a
new configuration.
This method should be more robust when trying to use on more
boards and has the benefit to provide correct configuration
examples.
This relies on the fact that overlays are applied in the order
they are provided in DTC_OVERLAY_FILE CMake variable.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
NPCX7/9 has a different ADC register structure. NPCX7 has 3 threshold
detectors from offset 0x14 & has 10 input channels. NPCX9 has 6
threshold detectors from offset 0x60 & has 12 input channels.
This commit fixes the NPCX ADC register structure.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
The function `zephyr_linker_sources()` states:
> When placing into NOINIT, RWDATA, RODATA, ROM_START, the contents of
> the files will be placed inside an output section, so assume the
> section definition is already present.
However, in the posix linker.ld template the NOINIT, RWDATA, RODATA, and
ROM_START was not placed inside a pre-defined output section, which
means that linker scripts created for native_posix when
`zephyr_linker_sources()` is used are invalid
This result in the following failure:
> /usr/bin/ld:zephyr/linker_zephyr_prebuilt.cmd:81: syntax error
> collect2: error: ld returned 1 exit status
This PR fixes this issue be predefining output sections according to
the documented behavior.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The strtol() function use errno to return error code.
However, it is not being initialized in the parser_arg()
function before calling the strtol(). Thus, hitting error
when performing net ping command with -c / -i parameters.
Signed-off-by: Kweh Hock Leong <hock.leong.kweh@intel.com>
Theoretically, source id check is not mandatory in the context we use
VT-D here (i.e. non VM one, just multi-vector MSI support)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Not sure this is requered as we do not mangle with domains, but let's
make sure this cache is clear.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
A surprising issue: while sys_set_bit() on VTD_GCMD_REG work on
apollo_lake, it seems to create border effect on elkhart_lake: it may
reset some previous bit to 0.
So switching to full write of the register at once, which works for
both.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Kconfig options will anyway enable/disable the driver relevantly.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
VT-D will only be enabled if MSI multi-vector will also be requested,
on x86_64, for all boards BUT QEMU ones.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no point to enable VT-D if PCIE MSI multi-vector support is not
requested, as VT-D is uniquely being used to remap MSI multi-vector
based interrupts.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Those MMIO registers might be mapped in RAM and thus it's
really important to keep storage space for such mapping.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
QI operation are not supposed to last forever.
It's not an actual timeout based on clock, but a dummy counter instead.
That's because system clock might not have beed initialized yet, since
VT-D's init comes first (and that same init will use QI...)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Depending on a VT-D capability, it might be necessary to flush objects
from the cache.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Looks like it's mandatory to invalidate the Interrupt Entry Cache in
VT-D and the only way to do so is to enable Queued Interface.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
IR faults are non-recoverable, so it's good to know why. Thus let's
handle the fault event and print the fault.
Other faults are printed as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Looks like a source of fault if pieces of IRTE are written instead of
the whole 64 bits block it belongs to.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In fact, in case of VT-D being enabled, it will require to get an
address and data for its own MSI based interrupts which cannot be
remapped (i.e.: will directly go to the relevant APIC).
This is necessary to get the Fault event supported in VT-D.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
If VT-D's interrupt remapping is in place, all IOAPIC RTEs need to get
remapped as well (or then they will be simply blocked).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding a way to pre-install the irg/vector on an irte and a way to get
an irte based on irq/vector.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
