This maps to Zephyr power state Standby. In this power
state the OS Timer cannot be used as a wakeup source as
it will be powered off. Hence the counter is enabled
and RTC is used to keep track of system ticks and wakeup
the system.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Since the clock source when running in PM mode 3 is the
slower 1KHx clock, we adjust the SYS_CLOCK_TICKS_PER_SEC
value to get better accuracy.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This clock is used for certain peripherals such
as RTC.
On certain RW612 boards such as rd_rw612_bga, XTAL32K
and ENET share pins. Add code to check if ENET and
XTAL32 are enabled at the same time.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
These socs were missing a config line to disable SYSTICK if the LPTMR is
configured for the system timer, similar to how other SOCs do this for
alternative system timers than systick.
This fixes build errors in the case where that lptmr kconfig is enabled.
Also, the LPTMR kconfig should be default no because it is a secondary
option for the system timer, being lower resolution than systick. This
also resolves build errors.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There is a configuration of the DCDC in the clock_init for the RT10xx.
The RT11xx has a kconfig flag ADJUST_DCDC to enable or disable DCDC
adjust code. This flag is now also used for the RT10xx to be able to
enable or disable the DCDC adjust code.
Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
In spi loopback test, high bandrate is 16Mbps while some source of lpspi
are too low to support this bandrate. According the reference mannual,
to support 16Mbps, Input frequency at least should be 2*16MHz.
Update LPSPI input freq to maximum to get more accurate band rate
because band rate must be divisible by input freq.
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
Currently, coex application is enable the mbedtls and PAS feature,
this causes BT_LONG_WQ thread to use more stack size.
Signed-off-by: Author You <author.you@nxp.com>
The part numbers for MCXC141VLH and MCXC142VFM
have all been set to MCXC141VFM, which lead to
build errors.
Signed-off-by: Maximilian Werner <maximilian.werner96@gmail.com>
The i.MX RT700 has an ultra-low power Sense Subsystem
which includes an ARM Cortex-M33 and
Cadence Tensilica HiFi 1 DSP.
Here, we add support for the HiFi1 core.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
The i.MX RT700 has a compute subsystem which includes
a primary ARM Cortex-M33 running at 325 MHz and
Cadence Tensilica HiFi4 DSP.
Here, we add support for the HiFi4 core.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
The lowest bit in DSE and FSEL field of pinctl register is not used
in the register and dts binding definitions also don't conver this bit,
so shift one more bit to align with actual register definitions.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
This driver was deprecated and must be removed by Zephyr version
4.1 according to lifecycle/release guidelines.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This config was missed when converting from eth_mcux to nxp_enet driver,
re-add it and use new one instead of old one.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Drop the override conditions to ADC_MCUX_12B1MSPS_SAR for imxrt, the
current one causes the driver to be built when it does not have to and
are not needed anyway, and drop the HAS_MCUX_12B1MSPS_SAR option
entirely as it's not needed anymore.
Tested with:
west build -p -b teensy40 tests/lib/devicetree/api_ext
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commits repairs calling function trdc_enable_all_access() only
when using build for standalone CM33 or CM7 core build.
For the multicore this function should be called only by CM33 core.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
After updating the main_clk, need to update the frequency tracked in
HAL MCUXpresso SDK framework for other drivers.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
This commit adds MBOX device tree entry for RT1180.
Adds functions to copy and boot CM7 core.
Adds MPU region for shared memory without caching.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
When TRDC permission fails to be obtained, it does not recycle to
access ELE core to prevent blocking problems. The current practice
only generates a log warning alarm.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
When TRDC permission fails to be obtained, it does not recycle to
access ELE core to prevent blocking problems. The current practice
only generates a log warning alarm.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
This SoC has an external XCACHE controller for CPU0
instruction and data bus.
Add code to enable the data cache. Instruction cache
is already enabled by SystemInit.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Decouple dependency of CONFIG_NXP_WIFI_SOFTAP_SUPPORT.
Add wifi defconfig to set default kconfig options when soft AP
enabled.
Signed-off-by: Fengming Ye <frank.ye@nxp.com>
The i.MX 91 SoC’s integrated EdgeLock® Secure Enclave provides
security features including lifecycle management, tamper detection,
secure boot and a simplified path to certifications. The i.MX 91
family features an Arm® Cortex®-A55 running at up to 1.4GHz,
support for modern LPDDR4 memory to enable platform longevity,
dual Gigabit Ethernet and dual USB ports, along with a rich set
of peripherals targeting medical, industrial and consumer IoT
market segments.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Make clock init functions in SOC level weak and global so they can be
overriden by board/app level.
Ideally these should have been put at board level but for now just make
them weak so they can be overriden without breaking anything.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The current soc clock_init only configures the FlexSPI1 interface and
not the FlexSPI2.
This Commit adds the clock configuration for the second FlexSPI
in case one boots from the FlexSPI2.
Signed-off-by: Felix Schramek <felix.schramek@gmail.com>
nxp_nbu_init extern definition is under CONFIG_NXP_RW6XX_BOOT_HEADER
and this produces an implicite definition warning when
the Kconfig is disabled. This is the case when both BLE Kconfig
and MCUboot bootloader Kconfig are enabled.
Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
The clock source for LPUART0 for the MCXC family is already
initialized in the corresponding soc.c -> clock_init().
Initialization for LPUART1 is missing. This is however
necessary if a user wants to configure LPUART1 as the default
console output.
Signed-off-by: Maximilian Werner <maximilian.werner96@gmail.com>
A problem was discovered during development: the
electrical characteristics of the pins were not
set according to the device tree settings.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
mbedtls is now used in BLE samples, increasing the stack depth needed
of the calling threads. This was causing stack overflows in several BLE
samples.
Increasing the BT_LONG_WQ_STACK stack size for peripheral_sc_only sample,
and the SYSTEM_WORKQUEUE stack size for ibeacon sample.
Signed-off-by: Jasen Liu <jasen.liu@nxp.com>
mbedtls is now used in BLE samples, increasing the stack depth needed
of the calling threads. This was causing stack overflows in several BLE
samples.
Increasing the BT_LONG_WQ_STACK stack size for peripheral_sc_only sample,
and the SYSTEM_WORKQUEUE stack size for ibeacon sample.
Signed-off-by: Jasen Liu <jasen.liu@nxp.com>
